Files
b210-k7-fpga/lib/timing/Makefile.srcs
T
Ben Hilburn 85ad83d8d3 fpga: Updating FPGA code for UHD-3.7.2-rc1
Original-commit: b63507efb3cf1a8fa20794c452d57028e18da182
2014-07-22 15:49:02 -07:00

13 lines
268 B
Makefile

#
# Copyright 2013 Ettus Research LLC
#
##################################################
# Timing Sources
##################################################
TIMING_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/timing/, \
time_compare.v \
timekeeper.v \
pps.v\
))