d6397f8f5ed13bdb5687282a65582a750daffd3d
Original-commit: a617ff132fef4a28370d8b10b42463a459d44f6b
Description
No description provided
84 MiB
Languages
Verilog
42.5%
VHDL
13%
SystemVerilog
12%
HTML
11.1%
C
9.6%
Other
11.6%