Paul Butler ce701301d0 fpga: tools: Add support for .sdc in Vivado ...

viv_utils.tcl will now read files with the .sdc suffix using the
read_xdc Vivado command. This is especially useful when I/O timing
constraints in the FPGA and CPLD need to depend on a common constant.


Original-commit: b47b1a467ee5796dbce359ff34c9d55a6acebc82

2020-04-02 08:13:35 -05:00

..

make

fixup! fpga: tools: Add modelsim to make sim targets

2020-03-23 18:01:53 -05:00

scripts

fpga: tools: Add support for .sdc in Vivado

2020-04-02 08:13:35 -05:00

utils

fpga: tools: Add ModelSim to run_testbenches.py

2020-03-23 18:01:53 -05:00