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b210-k7-fpga/top/b200/coregen/chipscope_icon.ucf
T
Ben Hilburn c91b74de33 Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.
Original-commit: 0df4b801a34697f2058b4a7b95e08d2a0576c9db
2013-10-10 10:17:27 -07:00

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366 B
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NET "U0/U_ICON/*/iDRCK_LOCAL" TNM_NET = J_CLK ;
TIMESPEC TS_J_CLK = PERIOD J_CLK 30 ns ;
#Update Constraints
NET "U0/iUPDATE_OUT" TNM_NET = U_CLK ;
NET "U0/iSHIFT_OUT" TIG ;
TIMESPEC TS_U_TO_J = FROM U_CLK TO J_CLK 15 ns ;
TIMESPEC TS_U_TO_U = FROM U_CLK TO U_CLK 15 ns ;
TIMESPEC TS_J_TO_D = FROM J_CLK TO D_CLK TIG ;
TIMESPEC TS_D_TO_J = FROM D_CLK TO J_CLK TIG ;