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Wade Fife d16d1e121c fpga: Update RFNOC_EDGE_TBL_FILE for Cygwin 
Original-commit: 7f5f771796de590c4ed4bba7b09cda3a906535c6
2020-06-12 15:50:16 -05:00
..
coregen_dsp
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
ip
x300: Expand DRAM address space to 1G
2020-05-18 17:50:38 -05:00
sim
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
build_x300.tcl
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
bus_int.v
X300: Make VITA time monotonic
2020-05-12 12:03:31 -05:00
capture_ddrlvds.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
dev_config.json
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2020-01-28 09:35:36 -08:00
gen_ddrlvds.v
Merge FPGA repository back into UHD repository
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Makefile
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Makefile.x300.inc
fpga: Update RFNOC_EDGE_TBL_FILE for Cygwin
2020-06-12 15:50:16 -05:00
nirio_chdr64_adapter.v
rfnoc: Add management filter to generic xport
2020-02-19 13:27:16 -06:00
setupenv.sh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
soft_ctrl.v
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2020-01-28 09:35:36 -08:00
timing.xdc
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2020-01-28 09:35:36 -08:00
x3x0_base.lvbitx
Merge FPGA repository back into UHD repository
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x300_1ge.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_10ge_port0.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_10ge_port1.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_10ge.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_aurora.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_core.v
x300: add front-panel GPIO source control
2020-02-18 07:21:24 -06:00
x300_dram.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_eth_interface.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_pcie_int.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_rfnoc_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_rfnoc_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_sfpp_io_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x300_zpu_config.vhd
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2020-01-28 09:35:36 -08:00
x300.v
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2020-01-28 09:35:36 -08:00
x300.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x310_rfnoc_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x310_rfnoc_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
x310_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00