adf6f576c6
FPGA: - Split up MB registers that control daughterboard specific settings so that daughterboards 0 and 1 could have different setings, in preparation for future devices that require different settings. This requires a compat number bump to 8.0. - Add registers for additional RFDC information, including the block/tile mapping of the individual channels, and information about resampling capabilities - Identify sections of code that would be specific to X410/ZBX and move them to their own headers, so it's trivial to add device-specific sections of code instead for other devices in the future. - This includes constraints for clocks and I/O pins. - Remove ability to do timed ctrlport transactions to the MB CPLD, this was unused and possibly broken. - Move daughterboard-specific code into its own code location (dboards/zbx) - Move X410-specific register documentation to its own location (doc/X410) - Refactor Makefiles to split out X410/ZBX specific components and allow switching between device types - Add 512-bit AXI interconnects - Make number of timekeepers configurable (X410 keeps the single timekeeper) MPM: - Required compat is bumped to 8.0 - Now supports new registers for detecting DSP capabilities and multi-rate settings for the daughterboards - Adds MMCM controls (currently unused) Co-authored-by: Wade Fife <wade.fife@ni.com> Co-authored-by: Ryan Marlow <ryan@lmarlow.com> Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Original-commit: c1d268917ea65dd9c5a42366014cb96d3c025223
98 lines
4.8 KiB
Systemverilog
98 lines
4.8 KiB
Systemverilog
//
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// Copyright 2023 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: dig_ifc_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// SPI_SLAVE_CONFIG : 0x0 (x4xx_gpio_spi.v)
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// SPI_TRANSACTION_CONFIG : 0x10 (x4xx_gpio_spi.v)
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// SPI_TRANSACTION_GO : 0x14 (x4xx_gpio_spi.v)
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// SPI_STATUS : 0x18 (x4xx_gpio_spi.v)
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// CONTROLLER_INFO : 0x1C (x4xx_gpio_spi.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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// SPI_SETUP Type (from x4xx_gpio_spi.v)
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localparam SPI_SETUP_SIZE = 32;
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localparam SPI_SETUP_MASK = 32'hFFFFFFF;
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localparam SLAVE_CLK_SIZE = 5; //SPI_SETUP:SLAVE_CLK
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localparam SLAVE_CLK_MSB = 4; //SPI_SETUP:SLAVE_CLK
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localparam SLAVE_CLK = 0; //SPI_SETUP:SLAVE_CLK
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localparam SLAVE_MOSI_SIZE = 5; //SPI_SETUP:SLAVE_MOSI
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localparam SLAVE_MOSI_MSB = 9; //SPI_SETUP:SLAVE_MOSI
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localparam SLAVE_MOSI = 5; //SPI_SETUP:SLAVE_MOSI
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localparam SLAVE_MISO_SIZE = 5; //SPI_SETUP:SLAVE_MISO
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localparam SLAVE_MISO_MSB = 14; //SPI_SETUP:SLAVE_MISO
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localparam SLAVE_MISO = 10; //SPI_SETUP:SLAVE_MISO
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localparam SLAVE_CS_SIZE = 5; //SPI_SETUP:SLAVE_CS
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localparam SLAVE_CS_MSB = 19; //SPI_SETUP:SLAVE_CS
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localparam SLAVE_CS = 15; //SPI_SETUP:SLAVE_CS
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localparam SPI_LENGTH_SIZE = 6; //SPI_SETUP:SPI_LENGTH
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localparam SPI_LENGTH_MSB = 25; //SPI_SETUP:SPI_LENGTH
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localparam SPI_LENGTH = 20; //SPI_SETUP:SPI_LENGTH
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localparam MISO_EDGE_SIZE = 1; //SPI_SETUP:MISO_EDGE
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localparam MISO_EDGE_MSB = 26; //SPI_SETUP:MISO_EDGE
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localparam MISO_EDGE = 26; //SPI_SETUP:MISO_EDGE
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localparam MOSI_EDGE_SIZE = 1; //SPI_SETUP:MOSI_EDGE
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localparam MOSI_EDGE_MSB = 27; //SPI_SETUP:MOSI_EDGE
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localparam MOSI_EDGE = 27; //SPI_SETUP:MOSI_EDGE
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//===============================================================================
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// Register Group SPI_OVER_GPIO_REGS
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//===============================================================================
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// SPI_SLAVE_CONFIG Register (from x4xx_gpio_spi.v)
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localparam SPI_SLAVE_CONFIG_COUNT = 4; // Number of elements in array
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// SPI_TRANSACTION_CONFIG Register (from x4xx_gpio_spi.v)
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localparam SPI_TRANSACTION_CONFIG = 'h10; // Register Offset
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localparam SPI_TRANSACTION_CONFIG_SIZE = 32; // register width in bits
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localparam SPI_TRANSACTION_CONFIG_MASK = 32'h3FFFF;
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localparam SPI_CLK_DIV_SIZE = 16; //SPI_TRANSACTION_CONFIG:SPI_CLK_DIV
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localparam SPI_CLK_DIV_MSB = 15; //SPI_TRANSACTION_CONFIG:SPI_CLK_DIV
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localparam SPI_CLK_DIV = 0; //SPI_TRANSACTION_CONFIG:SPI_CLK_DIV
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localparam SPI_SLAVE_SELECT_SIZE = 2; //SPI_TRANSACTION_CONFIG:SPI_SLAVE_SELECT
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localparam SPI_SLAVE_SELECT_MSB = 17; //SPI_TRANSACTION_CONFIG:SPI_SLAVE_SELECT
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localparam SPI_SLAVE_SELECT = 16; //SPI_TRANSACTION_CONFIG:SPI_SLAVE_SELECT
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// SPI_TRANSACTION_GO Register (from x4xx_gpio_spi.v)
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localparam SPI_TRANSACTION_GO = 'h14; // Register Offset
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localparam SPI_TRANSACTION_GO_SIZE = 32; // register width in bits
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localparam SPI_TRANSACTION_GO_MASK = 32'hFFFFFFFF;
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localparam SPI_DATA_SIZE = 32; //SPI_TRANSACTION_GO:SPI_DATA
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localparam SPI_DATA_MSB = 31; //SPI_TRANSACTION_GO:SPI_DATA
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localparam SPI_DATA = 0; //SPI_TRANSACTION_GO:SPI_DATA
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// SPI_STATUS Register (from x4xx_gpio_spi.v)
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localparam SPI_STATUS = 'h18; // Register Offset
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localparam SPI_STATUS_SIZE = 32; // register width in bits
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localparam SPI_STATUS_MASK = 32'h1FFFFFF;
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localparam SPI_RESPONSE_SIZE = 24; //SPI_STATUS:SPI_RESPONSE
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localparam SPI_RESPONSE_MSB = 23; //SPI_STATUS:SPI_RESPONSE
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localparam SPI_RESPONSE = 0; //SPI_STATUS:SPI_RESPONSE
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localparam SPI_READY_SIZE = 1; //SPI_STATUS:SPI_READY
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localparam SPI_READY_MSB = 24; //SPI_STATUS:SPI_READY
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localparam SPI_READY = 24; //SPI_STATUS:SPI_READY
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// CONTROLLER_INFO Register (from x4xx_gpio_spi.v)
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localparam CONTROLLER_INFO = 'h1C; // Register Offset
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localparam CONTROLLER_INFO_SIZE = 32; // register width in bits
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localparam CONTROLLER_INFO_MASK = 32'hF;
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localparam SLAVE_COUNT_SIZE = 4; //CONTROLLER_INFO:SLAVE_COUNT
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localparam SLAVE_COUNT_MSB = 3; //CONTROLLER_INFO:SLAVE_COUNT
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localparam SLAVE_COUNT = 0; //CONTROLLER_INFO:SLAVE_COUNT
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// Return the offset of an element of register array SPI_SLAVE_CONFIG
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function integer SPI_SLAVE_CONFIG (input integer i);
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SPI_SLAVE_CONFIG = (i * 'h4) + 'h0;
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endfunction
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