Logo
Explore Help
Sign In
miegl/b210-k7-fpga
Watch 1
Star 0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
bb2bfbfe95e5d01e95104f85c04d60d71a610b32
b210-k7-fpga/top/x400/ip/x4xx_ps_rfdc_bd
T
History
Friedrich Wenisch 3ed06cc861 fpga: x400: refactor RFDC block diagrams and timing constraints
Original-commit: a7bce74be154de9a68d6bdf2f9a6651b480b6dfa
2025-02-13 07:51:05 -06:00
..
common/regmap
mpm/fpga: x4xx: Major updates in preparation for future devices
2023-05-23 09:06:17 +02:00
x410_ps_rfdc_bd
fpga: x400: refactor RFDC block diagrams and timing constraints
2025-02-13 07:51:05 -06:00
x440_ps_rfdc_bd
fpga: x400: refactor RFDC block diagrams and timing constraints
2025-02-13 07:51:05 -06:00
Powered by Gitea Version: 1.27.3 Page: 50ms Template: 8ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API