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bb2bfbfe95e5d01e95104f85c04d60d71a610b32
b210-k7-fpga/top/e31x/e31x_idle_pins.xdc
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Martin BraunAlex WilliamsAndrej RodeAshish ChaudhariBen HilburnCiro NishiguchiDaniel JepsonDerek KozelEJ KreinarHumberto JimenezIan BuckleyJörg HofrichterJon KiserJosh BlumJonathon PendlumMatt EttusMichael WestMoritz FischerNick FosterNicolas CuervoPaul ButlerPaul DavidRyan MarlowSugandha GuptaSylvain MunautTrung TranVidush VishwanathWade Fife
 6b67702ad7 Merge FPGA repository back into UHD repository 
The FPGA codebase was removed from the UHD repository in 2014 to reduce
the size of the repository. However, over the last half-decade, the
split between the repositories has proven more burdensome than it has
been helpful. By merging the FPGA code back, it will be possible to
create atomic commits that touch both FPGA and UHD codebases. Continuous
integration testing is also simplified by merging the repositories,
because it was previously difficult to automatically derive the correct
UHD branch when testing a feature branch on the FPGA repository.

This commit also updates the license files and paths therein.

We are therefore merging the repositories again. Future development for
FPGA code will happen in the same repository as the UHD host code and
MPM code.

== Original Codebase and Rebasing ==

The original FPGA repository will be hosted for the foreseeable future
at its original local location: https://github.com/EttusResearch/fpga/

It can be used for bisecting, reference, and a more detailed history.

The final commit from said repository to be merged here is
05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as
v4.0.0.0-pre-uhd-merge.

If you have changes in the FPGA repository that you want to rebase onto
the UHD repository, simply run the following commands:

- Create a directory to store patches (this should be an empty
  directory):

    mkdir ~/patches

- Now make sure that your FPGA codebase is based on the same state as
  the code that was merged:

    cd src/fpga # Or wherever your FPGA code is stored
    git rebase v4.0.0.0-pre-uhd-merge

  Note: The rebase command may look slightly different depending on what
  exactly you're trying to rebase.

- Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge:

    git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches

  Note: Make sure that only patches are stored in your output directory.
  It should otherwise be empty. Make sure that you picked the correct
  range of commits, and only commits you wanted to rebase were exported
  as patch files.

- Go to the UHD repository and apply the patches:

    cd src/uhd # Or wherever your UHD repository is stored
    git am --directory fpga ~/patches/*
    rm -rf ~/patches # This is for cleanup

== Contributors ==

The following people have contributed mainly to these files (this list
is not complete):

Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Andrej Rode <andrej.rode@ettus.com>
Co-authored-by: Ashish Chaudhari <ashish@ettus.com>
Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ettus.com>
Co-authored-by: EJ Kreinar <ej@he360.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Ian Buckley <ian.buckley@gmail.com>
Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Jon Kiser <jon.kiser@ni.com>
Co-authored-by: Josh Blum <josh@joshknows.com>
Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Matt Ettus <matt@ettus.com>
Co-authored-by: Michael West <michael.west@ettus.com>
Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com>
Co-authored-by: Nick Foster <nick@ettus.com>
Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Paul David <paul.david@ettus.com>
Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com>
Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-authored-by: Sylvain Munaut <tnt@246tNt.com>
Co-authored-by: Trung Tran <trung.tran@ettus.com>
Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>


Original-commit: bafa9d95453387814ef25e6b6256ba8db2df612f
2020-01-28 09:35:36 -08:00

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###############################################################################
# Pin mapping
###############################################################################
## RF board connector pins
# Pin 1
set_property PACKAGE_PIN H19 [get_ports {DB_IO[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[0]}]
# Pin 2
# 3.3v DB
# Pin 3
set_property PACKAGE_PIN F19 [get_ports {DB_IO[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[1]}]
#Pin 4
# 3.3v DB
#Pin 5
set_property PACKAGE_PIN G19 [get_ports {DB_IO[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[2]}]
#Pin 6
set_property PACKAGE_PIN E19 [get_ports {DB_IO[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[3]}]
#Pin 7
set_property PACKAGE_PIN E20 [get_ports {DB_IO[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[4]}]
#Pin 8
set_property PACKAGE_PIN G21 [get_ports {DB_IO[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[5]}]
#Pin 9
set_property PACKAGE_PIN G22 [get_ports {DB_IO[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[6]}]
#Pin 10
set_property PACKAGE_PIN G20 [get_ports {DB_IO[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[7]}]
#Pin 11
set_property PACKAGE_PIN H22 [get_ports {DB_IO[8]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[8]}]
#Pin 12
set_property PACKAGE_PIN F22 [get_ports {DB_IO[9]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[9]}]
#Pin 13
set_property PACKAGE_PIN A17 [get_ports {DB_IO[10]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[10]}]
#Pin 14
set_property PACKAGE_PIN F21 [get_ports {DB_IO[11]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[11]}]
#Pin 15
set_property PACKAGE_PIN B16 [get_ports {DB_IO[12]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[12]}]
#Pin 16 -- Not used
#set_property PACKAGE_PIN J21 [get_ports {}]
#set_property IOSTANDARD LVCMOS18 [get_ports {}]
#Pin 17
set_property PACKAGE_PIN A19 [get_ports {DB_IO[13]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[13]}]
#Pin 18 -- Not used
#set_property PACKAGE_PIN J22 [get_ports {}]
#set_property IOSTANDARD LVCMOS18 [get_ports {}]
#Pin 19
set_property PACKAGE_PIN B15 [get_ports {DB_IO[14]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[14]}]
#Pin 20
set_property PACKAGE_PIN K21 [get_ports {DB_IO[15]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[15]}]
#Pin 21
set_property PACKAGE_PIN A16 [get_ports {DB_IO[16]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[16]}]
#Pin 22
set_property PACKAGE_PIN L22 [get_ports {DB_IO[17]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[17]}]
#Pin 23
set_property PACKAGE_PIN B17 [get_ports {DB_IO[18]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[18]}]
#Pin 24
set_property PACKAGE_PIN L21 [get_ports {DB_IO[19]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[19]}]
#Pin 25
set_property PACKAGE_PIN C15 [get_ports {DB_IO[20]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[20]}]
#Pin 26
set_property PACKAGE_PIN R18 [get_ports {DB_IO[21]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[21]}]
#Pin 27
set_property PACKAGE_PIN E18 [get_ports {DB_IO[22]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[22]}]
#Pin 28
set_property PACKAGE_PIN T18 [get_ports {DB_IO[23]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[23]}]
#Pin 29
set_property PACKAGE_PIN F18 [get_ports {DB_IO[24]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[24]}]
#Pin 30
set_property PACKAGE_PIN M20 [get_ports {DB_IO[25]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[25]}]
#Pin 31
set_property PACKAGE_PIN F17 [get_ports {DB_IO[26]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[26]}]
#Pin 32
set_property PACKAGE_PIN M15 [get_ports {DB_IO[27]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[27]}]
#Pin 33
set_property PACKAGE_PIN G17 [get_ports {DB_IO[28]}]
set_property IOSTANDARD LVCMOS33 [get_ports {DB_IO[28]}]
#Pin 34
set_property PACKAGE_PIN J18 [get_ports {DB_IO[29]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[29]}]
#Pin 35
set_property PACKAGE_PIN U5 [get_ports {DB_IO[30]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[30]}]
#Pin 36
set_property PACKAGE_PIN J20 [get_ports {DB_IO[31]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[31]}]
#Pin 37
set_property PACKAGE_PIN U6 [get_ports {DB_IO[32]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[32]}]
#Pin 38
set_property PACKAGE_PIN K19 [get_ports {DB_IO[33]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[33]}]
#Pin 39
set_property PACKAGE_PIN AB5 [get_ports {DB_IO[34]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[34]}]
#Pin 40
set_property PACKAGE_PIN K20 [get_ports {DB_IO[35]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[35]}]
#Pin 41
set_property PACKAGE_PIN AB6 [get_ports {DB_IO[36]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[36]}]
#Pin 42
set_property PACKAGE_PIN L19 [get_ports {DB_IO[37]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[37]}]
#Pin 43
set_property PACKAGE_PIN AB7 [get_ports {DB_IO[38]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[38]}]
#Pin 44
set_property PACKAGE_PIN V12 [get_ports {DB_IO[39]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[39]}]
#Pin 45
set_property PACKAGE_PIN AA4 [get_ports {DB_IO[40]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[40]}]
#Pin 46
set_property PACKAGE_PIN W12 [get_ports {DB_IO[41]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[41]}]
#Pin 47
set_property PACKAGE_PIN T6 [get_ports {DB_IO[42]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[42]}]
#Pin 48
set_property PACKAGE_PIN U11 [get_ports {DB_IO[43]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[43]}]
#Pin 49
# 1.8V
#Pin 50
set_property PACKAGE_PIN W6 [get_ports {DB_IO[44]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[44]}]
#Pin 51
# 1.8V
#Pin 52
set_property PACKAGE_PIN W5 [get_ports {DB_IO[45]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[45]}]
#Pin 53
# 5V
#Pin 54
set_property PACKAGE_PIN V7 [get_ports {DB_IO[46]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[46]}]
#Pin 55
# 5V
#Pin 56
set_property PACKAGE_PIN W7 [get_ports {DB_IO[47]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[47]}]
#Pin 57
# 5V
#Pin 58
set_property PACKAGE_PIN V4 [get_ports {DB_IO[48]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[48]}]
#Pin 59
# 5V
#Pin 60
set_property PACKAGE_PIN V5 [get_ports {DB_IO[49]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[49]}]
#Pin 61
# 1.8V
#Pin 62
set_property PACKAGE_PIN U4 [get_ports {DB_IO[50]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[50]}]
#Pin 63
# 1.8V
#Pin 64
set_property PACKAGE_PIN T4 [get_ports {DB_IO[51]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[51]}]
#Pin 65
# GND
#Pin 66
set_property PACKAGE_PIN R6 [get_ports {DB_IO[52]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[52]}]
#Pin 67
set_property PACKAGE_PIN AB1 [get_ports {DB_IO[53]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[53]}]
#Pin 68
# GND
#Pin 69
set_property PACKAGE_PIN AB4 [get_ports {DB_IO[54]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[54]}]
#Pin 70
set_property PACKAGE_PIN M19 [get_ports {DB_IO[55]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[55]}]
#Pin 71
set_property PACKAGE_PIN AB2 [get_ports {DB_IO[56]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[56]}]
#Pin 72
# GND
#Pin 73
# GND
#Pin 74
set_property PACKAGE_PIN T16 [get_ports {DB_IO[57]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[57]}]
#Pin 75
set_property PACKAGE_PIN J15 [get_ports {DB_IO[58]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[58]}]
#Pin 76
# GND
#Pin 77
set_property PACKAGE_PIN J16 [get_ports {DB_IO[59]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[59]}]
#Pin 78
set_property PACKAGE_PIN N15 [get_ports {DB_IO[60]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[60]}]
#Pin 79
set_property PACKAGE_PIN J17 [get_ports {DB_IO[61]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[61]}]
#Pin 80
set_property PACKAGE_PIN M21 [get_ports {DB_IO[62]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[62]}]
#Pin 81
set_property PACKAGE_PIN K15 [get_ports {DB_IO[63]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[63]}]
#Pin 82
set_property PACKAGE_PIN P15 [get_ports {DB_IO[64]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[64]}]
#Pin 83
set_property PACKAGE_PIN K18 [get_ports {DB_IO[65]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[65]}]
#Pin 84
set_property PACKAGE_PIN N19 [get_ports {DB_IO[66]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[66]}]
#Pin 85
set_property PACKAGE_PIN K16 [get_ports {DB_IO[67]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[67]}]
#Pin 86
set_property PACKAGE_PIN P18 [get_ports {DB_IO[68]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[68]}]
#Pin 87
set_property PACKAGE_PIN L16 [get_ports {DB_IO[69]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[69]}]
#Pin 88
set_property PACKAGE_PIN P20 [get_ports {DB_IO[70]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[70]}]
#Pin 89
set_property PACKAGE_PIN L17 [get_ports {DB_IO[71]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[71]}]
#Pin 90
set_property PACKAGE_PIN P17 [get_ports {DB_IO[72]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[72]}]
#Pin 91
set_property PACKAGE_PIN M16 [get_ports {DB_IO[73]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[73]}]
#Pin 92
set_property PACKAGE_PIN P21 [get_ports {DB_IO[74]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[74]}]
#Pin 93
set_property PACKAGE_PIN M17 [get_ports {DB_IO[75]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[75]}]
#Pin 94
set_property PACKAGE_PIN R20 [get_ports {DB_IO[76]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[76]}]
#Pin 95
set_property PACKAGE_PIN N17 [get_ports {DB_IO[77]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[77]}]
#Pin 96
set_property PACKAGE_PIN T17 [get_ports {DB_IO[78]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[78]}]
#Pin 97
set_property PACKAGE_PIN N20 [get_ports {DB_IO[79]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[79]}]
#Pin 98
set_property PACKAGE_PIN M22 [get_ports {DB_IO[80]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[80]}]
#Pin 99
set_property PACKAGE_PIN N18 [get_ports {DB_IO[81]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[81]}]
#Pin 100
set_property PACKAGE_PIN N22 [get_ports {DB_IO[82]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[82]}]
#Pin 101
set_property PACKAGE_PIN L18 [get_ports {DB_IO[83]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[83]}]
#Pin 102
set_property PACKAGE_PIN P22 [get_ports {DB_IO[84]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[84]}]
#Pin 103
# GND
#Pin 104
set_property PACKAGE_PIN R21 [get_ports {DB_IO[85]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[85]}]
#Pin 105
# 1.8V
#Pin 106
# GND
#Pin 107
set_property PACKAGE_PIN AA8 [get_ports {DB_IO[86]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[86]}]
#Pin 108
set_property PACKAGE_PIN Y11 [get_ports {DB_IO[87]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[87]}]
#Pin 109
set_property PACKAGE_PIN AA9 [get_ports {DB_IO[88]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[88]}]
#Pin 110
set_property PACKAGE_PIN AB10 [get_ports {DB_IO[89]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[89]}]
#Pin 111
set_property PACKAGE_PIN AB9 [get_ports {DB_IO[90]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[90]}]
#Pin 112
set_property PACKAGE_PIN AA12 [get_ports {DB_IO[91]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[91]}]
#Pin 113
set_property PACKAGE_PIN U10 [get_ports {DB_IO[92]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[92]}]
#Pin 114
set_property PACKAGE_PIN U12 [get_ports {DB_IO[93]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[93]}]
#Pin 115
set_property PACKAGE_PIN Y10 [get_ports {DB_IO[94]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[94]}]
#Pin 116
set_property PACKAGE_PIN AB11 [get_ports {DB_IO[95]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[95]}]
#Pin 117
set_property PACKAGE_PIN U9 [get_ports {DB_IO[96]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[96]}]
#Pin 118
set_property PACKAGE_PIN AA11 [get_ports {DB_IO[97]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[97]}]
#Pin 119
set_property PACKAGE_PIN Y4 [get_ports {DB_IO[98]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[98]}]
#Pin 120
set_property PACKAGE_PIN AB12 [get_ports {DB_IO[99]}]
set_property IOSTANDARD LVCMOS18 [get_ports {DB_IO[99]}]
### Other I/O
set_property PACKAGE_PIN A22 [get_ports AVR_CS_R]
set_property IOSTANDARD LVCMOS33 [get_ports AVR_CS_R]
set_property PACKAGE_PIN B22 [get_ports AVR_IRQ]
set_property IOSTANDARD LVCMOS33 [get_ports AVR_IRQ]
set_property PACKAGE_PIN C22 [get_ports AVR_MISO_R]
set_property IOSTANDARD LVCMOS33 [get_ports AVR_MISO_R]
set_property PACKAGE_PIN A21 [get_ports AVR_MOSI_R]
set_property IOSTANDARD LVCMOS33 [get_ports AVR_MOSI_R]
set_property PACKAGE_PIN D22 [get_ports AVR_SCK_R]
set_property IOSTANDARD LVCMOS33 [get_ports AVR_SCK_R]
set_property PACKAGE_PIN E21 [get_ports ONSWITCH_DB]
set_property IOSTANDARD LVCMOS33 [get_ports ONSWITCH_DB]
set_property PACKAGE_PIN Y9 [get_ports GPS_PPS]
set_property IOSTANDARD LVCMOS18 [get_ports GPS_PPS]
set_property PACKAGE_PIN D18 [get_ports PPS_EXT_IN]
set_property IOSTANDARD LVCMOS33 [get_ports PPS_EXT_IN]
set_property PACKAGE_PIN E16 [get_ports {PL_GPIO[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {PL_GPIO[0]}]
set_property PACKAGE_PIN C18 [get_ports {PL_GPIO[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {PL_GPIO[1]}]
set_property PACKAGE_PIN D17 [get_ports {PL_GPIO[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {PL_GPIO[2]}]
set_property PACKAGE_PIN D16 [get_ports {PL_GPIO[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {PL_GPIO[3]}]
set_property PACKAGE_PIN D15 [get_ports {PL_GPIO[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {PL_GPIO[4]}]
set_property PACKAGE_PIN E15 [get_ports {PL_GPIO[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {PL_GPIO[5]}]
set_property PULLDOWN true [get_ports {PL_GPIO[0]}]
set_property PULLDOWN true [get_ports {PL_GPIO[1]}]
set_property PULLDOWN true [get_ports {PL_GPIO[2]}]
set_property PULLDOWN true [get_ports {PL_GPIO[3]}]
set_property PULLDOWN true [get_ports {PL_GPIO[4]}]
set_property PULLDOWN true [get_ports {PL_GPIO[5]}]
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