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Wade Fife b566c415a1 fpga: lib: Add AXI-Stream splitter (axis_split) 
The axis_split module takes a single AXI-Stream input and duplicates it
onto multiple AXI-Stream outputs. This block correctly handles the
somewhat tricky flow-control logic so that the AXI-Stream handshake
protocol is honored at all top-level ports.


Original-commit: fa0f4b2833119d57d331f592028ff9f032895c89
2020-04-14 16:37:43 -05:00
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axi
fpga: lib: Add AXI-Stream splitter (axis_split)
2020-04-14 16:37:43 -05:00
control
Merge FPGA repository back into UHD repository
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control_200
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dsp
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extramfifo
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fifo
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fifo_200
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gpif2
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hls
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io_cap_gen
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io_port2
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ip
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packet_proc
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packet_proc_200
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radio_200
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2020-01-28 09:35:36 -08:00
rfnoc
fpga: rfnoc: Add gate to dynamically enable control-port interfaces
2020-04-01 11:02:16 -05:00
sim
fpga: Fix errors found by linting with vsim
2020-03-23 08:23:51 -05:00
simple_gemac
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
timing
fixup! lib: add option for output register in pps generator
2020-02-05 09:26:57 -06:00
vita_200
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
vivado_ipi
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wb_spi
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2020-01-28 09:35:36 -08:00
white_rabbit/wr_cores_v4_2
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wishbone
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xge
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xge_interface
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zpu
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zynq_fifo
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