Wade Fife b5230b0256 fpga: tools: Support new FPGA types in viv_simulator.mak ...

This updates the existing PART_NAME generation used in simulation
makefiles to work with newer part families by calling
viv_gen_part_id.py to generate the part name needed by Vivado.


Original-commit: 648c70ae758ab1d15c7ec6cbe57672e8c27640cd

2021-06-17 08:16:59 -05:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: lib: Update register comments in eth_regs.vh

2021-06-10 11:56:58 -05:00

sim

fpga: sim: Add slave_idle() to PkgAxiStreamBfm.sv

2021-06-10 11:56:58 -05:00

tools

fpga: tools: Support new FPGA types in viv_simulator.mak

2021-06-17 08:16:59 -05:00

top

fpga: x400: zbx: Add support for ZBX CPLD

2021-06-10 11:56:58 -05:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

Description

No description provided

84 MiB

Languages

Verilog 42.5%

VHDL 13%

SystemVerilog 12%

HTML 11.1%

C 9.6%

Other 11.6%