miegl/b210-k7-fpga
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Ashish Chaudhari adf2da6ac7 fpga: Multiple X300 FPGA bugfixes and enhancements 
- Fixed 10GigE firmware communication issues and sequence errors for TX
- Multiple changes to help ease timing closure
- Cleaned up build scripts
- Switched to Xilinx ISE 14.7 as the default build tool for X300


Original-commit: 64d71dcbc5fa6790385b288de25224d386b047b0
2014-09-24 18:45:31 -07:00
lib
fpga: Multiple X300 FPGA bugfixes and enhancements
2014-09-24 18:45:31 -07:00
sim
Pushing the bulk of UHD-3.7.0 code.
2014-02-14 12:05:07 -08:00
top
fpga: Multiple X300 FPGA bugfixes and enhancements
2014-09-24 18:45:31 -07:00
README.txt
Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.
2013-10-10 10:17:27 -07:00
vita_chdr.txt
Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.
2013-10-10 10:17:27 -07:00

README.txt

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