miegl/b210-k7-fpga
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b210-k7-fpga/top/x400/ip/axi_inter_2x64_512_bd
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Wade Fife 0e65ae3c86 fpga: x400: Add 1x64, 2x64, and 1x128 DRAM interconnect 
Original-commit: daf1ed2ad2fbb72f16a9909fa75a0ba9e2879583
2023-02-24 08:07:17 -06:00
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axi_inter_2x64_512_bd.tcl
fpga: x400: Add 1x64, 2x64, and 1x128 DRAM interconnect
2023-02-24 08:07:17 -06:00
Makefile.inc
fpga: x400: Add 1x64, 2x64, and 1x128 DRAM interconnect
2023-02-24 08:07:17 -06:00