Wade Fife a300408721 fpga: lib: Fix simulation of axi_fir_filter ...

The always(*) block was never executing in some simulators because
there were no signals on the right-hand side in the block. Changing it
to an initial block ensures it always runs.


Original-commit: 0b965d579e2df962b91dac141eef6668f932e992

2021-04-09 17:26:59 -05:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: lib: Fix simulation of axi_fir_filter

2021-04-09 17:26:59 -05:00

sim

fpga: sim: Fix stream command and status models

2020-08-31 08:16:43 -05:00

tools

fpga: Remove Python2 support from build system

2021-01-04 13:28:36 -06:00

top

fpga: e320: Improve timing on LVDS interface

2020-12-11 07:41:13 -06:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

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