a08d0c4bd56b7a36edea3ca81d88c2fc344b4ffb
Original-commit: fb16ec77dc36e6d24b6ada6d7f9ec0484499b0ce
Description
No description provided
84 MiB
Languages
Verilog
42.5%
VHDL
13%
SystemVerilog
12%
HTML
11.1%
C
9.6%
Other
11.6%