72 lines
2.4 KiB
Verilog
72 lines
2.4 KiB
Verilog
// Copyright 2012 Ettus Research LLC
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//
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// axi_loopback.v
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//
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// Loopback all data assuming it's in CHDR format, and swap SRC/DST in the SID in the process
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// thus reflecting it back to it's origin...in theory!
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//
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module axi_loopback
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(
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input clk,
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input reset,
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// Input AXIS
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input [WIDTH-1:0] i_tdata,
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input i_tlast,
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input i_tvalid,
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output i_tready,
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// Output AXIS
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output [WIDTH-1:0] o_tdata,
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output o_tlast,
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output o_tvalid,
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input o_tready
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);
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localparam WIDTH=64;
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wire [WIDTH-1:0] fifoin_tdata,fifoout_tdata,dmux_tdata;
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wire fifoin_tlast,dmux_tlast;
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wire fifoin_tvalid,dmux_tvalid;
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wire fifoin_tready,dmux_tready;
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// Since most real endpoints go via Demux4 place one in here to look for bugs.
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axi_demux4 #(.ACTIVE_CHAN(4'b0001), .WIDTH(WIDTH)) demux
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(.clk(clk), .reset(reset), .clear(1'b0),
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.header(), .dest(2'b00),
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.i_tdata(i_tdata), .i_tlast(i_tlast), .i_tvalid(i_tvalid), .i_tready(i_tready),
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.o0_tdata(dmux_tdata), .o0_tlast(dmux_tlast), .o0_tvalid(dmux_tvalid), .o0_tready(dmux_tready),
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.o1_tdata(), .o1_tlast(), .o1_tvalid(), .o1_tready(1'b1),
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.o2_tdata(), .o2_tlast(), .o2_tvalid(), .o2_tready(1'b1),
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.o3_tdata(), .o3_tlast(), .o3_tvalid(), .o3_tready(1'b1));
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axi_fifo_short #(.WIDTH(WIDTH+1)) axi_fifo_short1
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(.clk(clk), .reset(reset), .clear(1'b0),
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.i_tdata({dmux_tlast,dmux_tdata}), .i_tvalid(dmux_tvalid), .i_tready(dmux_tready),
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.o_tdata({fifoin_tlast,fifoin_tdata}), .o_tvalid(fifoin_tvalid), .o_tready(fifoin_tready),
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.space(), .occupied());
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reg header;
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always @(posedge clk) begin
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if(reset) begin
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header <= 1'b1;
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end else if (header) begin
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if(fifoin_tvalid & fifoin_tready & ~fifoin_tlast) header <= 1'b0;
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end else begin
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if(fifoin_tvalid & fifoin_tready & fifoin_tlast) header <= 1'b1;
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end
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end
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assign fifoout_tdata = header ?
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{fifoin_tdata[63:32] ,fifoin_tdata[15:0],fifoin_tdata[31:16]} :
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fifoin_tdata;
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axi_fifo_short #(.WIDTH(WIDTH+1)) axi_fifo_short2
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(.clk(clk), .reset(reset), .clear(1'b0),
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.i_tdata({fifoin_tlast,fifoout_tdata}), .i_tvalid(fifoin_tvalid), .i_tready(fifoin_tready),
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.o_tdata({o_tlast,o_tdata}), .o_tvalid(o_tvalid), .o_tready(o_tready),
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.space(), .occupied());
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endmodule // axi_loopback
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