Files
b210-k7-fpga/sim/b2x0/sim_b2x0_1/run_isim
T
Ben Hilburn fbbc991a7d Pushing the bulk of UHD-3.7.0 code.
Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
2014-02-14 12:05:07 -08:00

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vlogcomp -work work ${XILINX}/verilog/src/glbl.v
vlogcomp -work work --sourcelibext .v \
--sourcelibdir ../../../lib/axi \
--sourcelibdir ../../../lib/fifo \
--sourcelibdir ../../../lib/control \
--sourcelibdir ../../../top/b200/coregen \
--sourcelibdir ../../../top/b200 \
--sourcelibdir ../../../lib/timing \
--sourcelibdir ../../../lib/vita \
--sourcelibdir ../../../lib/packet_proc \
--sourcelibdir ../../../lib/dsp \
--sourcelibdir ../../../lib/wishbone \
--sourcelibdir ../../../lib/gpif2 \
../../../top/b200/b200_tb.v
fuse work.b200_tb work.glbl -L unisims_ver -L xilinxcorelib_ver -o b200_tb.exe
# run the simulation scrip
./b200_tb.exe # -gui #-tclbatch simcmds.tcl