Wade Fife 81e8b63fb9 fpga: tools: Fix python2 reference in viv_ip_builder.mak ...

Original-commit: 244608187f824903ea2c8b003be1918d7dc21d5e

2021-06-17 08:16:59 -05:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

fpga: lib: Update register comments in eth_regs.vh

2021-06-10 11:56:58 -05:00

sim

fpga: sim: Add slave_idle() to PkgAxiStreamBfm.sv

2021-06-10 11:56:58 -05:00

tools

fpga: tools: Fix python2 reference in viv_ip_builder.mak

2021-06-17 08:16:59 -05:00

top

fpga: x400: zbx: Add support for ZBX CPLD

2021-06-10 11:56:58 -05:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

Description

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84 MiB

Languages

Verilog 42.5%

VHDL 13%

SystemVerilog 12%

HTML 11.1%

C 9.6%

Other 11.6%