Wade Fife
b566c415a1
The axis_split module takes a single AXI-Stream input and duplicates it onto multiple AXI-Stream outputs. This block correctly handles the somewhat tricky flow-control logic so that the AXI-Stream handshake protocol is honored at all top-level ports. Original-commit: fa0f4b2833119d57d331f592028ff9f032895c89
38 lines
841 B
Makefile
38 lines
841 B
Makefile
#
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# Copyright 2012-2013 Ettus Research LLC
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# Copyright 2014 Ettus Research, a National Instruments Company
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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##################################################
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# FIFO Sources
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##################################################
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AXI_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/axi/, \
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axi_chdr_header_trigger.v \
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axi_chdr_test_pattern.v \
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axi_defs.v \
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axi_dma_fifo.v \
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axi_dma_master.v \
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axi_replay.v \
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axi_embed_tlast.v \
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axi_extract_tlast.v \
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axi_fast_extract_tlast.v \
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axi_embed_tlast_tkeep.v \
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axi_extract_tlast_tkeep.v \
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axi_fast_fifo.v \
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axi_to_strobed.v \
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axis_data_swap.v \
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axi_dummy.v \
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strobed_to_axi.v \
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axi_add_preamble.v \
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axi_strip_preamble.v \
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crc_xnor.v \
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axis_packet_flush.v \
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axis_shift_register.v \
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axis_upsizer.v \
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axis_downsizer.v \
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axis_width_conv.v \
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axis_split.v \
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))
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