Logo
Explore Help
Sign In
miegl/b210-k7-fpga
Watch 1
Star 0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
6193c765fe23093820a7701a38890b382c29ac0f
b210-k7-fpga/lib/sim
T
History
Sam O'Brien a63c80bd23 fpga: lib: Upgrade to Vivado 2021.1
Original-commit: b0dc0faed1eceef3ba28ce03555658fca2423c46
2022-08-25 13:55:30 -05:00
..
arm_deframer
fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh
2022-01-25 14:09:15 -07:00
axi
fpga: Fix errors found by linting with vsim
2020-03-23 08:23:51 -05:00
axi_packet_gate
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
control/gearbox_2x1
fpga: lib: Add 2 to 1 gearbox module
2021-06-03 11:26:54 -05:00
dsp
fpga: rfnoc: Fix testbenches to run under ModelSim
2020-07-20 15:33:22 -05:00
fifo
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
io_cap_gen
fpga: lib: Upgrade to Vivado 2021.1
2022-08-25 13:55:30 -05:00
io_port2
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
packet_proc
fpga: lib: Pipeline and add clken to ip_hdr_checksum
2020-06-24 09:55:14 -05:00
rfnoc
fpga: rfnoc: Remove deprecated files
2020-08-23 13:52:26 -05:00
simple_gemac
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
wishbone/simple_uart
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
Makefile.srcs
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
Powered by Gitea Version: 1.27.3 Page: 57ms Template: 8ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API