Files
b210-k7-fpga/top/x400/dts/x410-common.dtsi
T
61782b02d7 fpga: x400: Add support for X410 motherboard FPGA
Co-authored-by: Andrew Moch <Andrew.Moch@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Hector Rubio <hrubio@ni.com>


Original-commit: 6d3765605262016a80f71e36357f749ea35cbe5a
2021-06-10 11:56:58 -05:00

29 lines
589 B
Devicetree

/*
* Copyright 2021 Ettus Research, a National Instruments Brand
*
* SPDX-License-Identifier: LGPL-3.0-or-later
*/
&fpga_full {
#address-cells = <2>;
#size-cells = <2>;
uio@1000000000 {
compatible = "usrp-uio";
reg = <0x10 0x00000000 0x0 0x1000>;
reg-names = "jtag-0";
status = "okay";
};
uio@1000080000 {
compatible = "usrp-uio";
reg = <0x10 0x00080000 0x0 0x20000>;
reg-names = "ctrlport-mboard-regs";
status = "okay";
};
uio@10000A0000 {
compatible = "usrp-uio";
reg = <0x10 0x000A0000 0x0 0x4000>;
reg-names = "mboard-regs";
status = "okay";
};
};