miegl/b210-k7-fpga
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b210-k7-fpga/lib/io_port2
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Aaron Rossetto b7c900445e fpga: Add SPDX license identifier 
Original-commit: c718ce6cd5b84ceaca50fe02f7ad9e95364472cc
2022-02-23 12:24:32 -06:00
..
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
create-lvbitx.py
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
ioport2_msg_codec.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
LvFpga_Chinch_Interface.ngc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
LvFpga_Chinch_Interface.v
fpga: Add SPDX license identifier
2022-02-23 12:24:32 -06:00
LvFpga_Chinch_Interface.vh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
Makefile.srcs
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_axi_wb_conv.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_basic_regs.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_dma_ctrl_tb.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_dma_ctrl.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_iop2_msg_arbiter_tb.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_iop2_msg_arbiter.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_lossy_samp_gate.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_pkt_route_specifier.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_wb_reg_core_tb.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
pcie_wb_reg_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00