michael-west 4fa8a41e0b TwinRX: Remove frontend filter ...

Removing the FIR filter in the frontend to reclaim resources and remove
redundancy when using a DDC block.  The default image has a DDC block,
so only users making custom RFNoC images and using TwinRX will need to
take care to properly downconvert the full bandwidth coming from the
radio block.

Signed-off-by: michael-west <michael.west@ettus.com>


Original-commit: ad533eb6416c76d2a986c97fff846785ee56567e

2021-04-08 08:48:18 -05:00

export/x300/radio

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

lib

TwinRX: Remove frontend filter

2021-04-08 08:48:18 -05:00

sim

fpga: sim: Fix stream command and status models

2020-08-31 08:16:43 -05:00

tools

fpga: Remove Python2 support from build system

2021-01-04 13:28:36 -06:00

top

fpga: e320: Improve timing on LVDS interface

2020-12-11 07:41:13 -06:00

.gitignore

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

build.py

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

LICENSE.md

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

S

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