Wade Fife
d6849765ec
fpga: sim: chdr_stream_endpoint_tb improvements
...
- Adds test coverage for stream command and status packets
- Cleans up report output during simulation
- Stops clocks at the end of simulation, so chdr_stream_endpoint_tb can
be run directly instead of just chdr_stream_endpoint_all_tb
Original-commit: 97cb396297828f57bba455a275966c58f1abce6e
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