Wade Fife 2253f7dbb0 fpga: n3xx: Fix timeout for timekeeper registers
This implements the same change that was made for E31x. The same issue
wasn't reproduced on N3xx, however this change keeps the code
consistent and eliminates the potential for the same problem.


Original-commit: e94a209c5b2559348593a6732d694fd49ab59ad0
2020-08-19 12:28:22 -05:00
2020-07-31 13:22:29 -05:00
S
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