61782b02d7
Co-authored-by: Andrew Moch <Andrew.Moch@ni.com> Co-authored-by: Daniel Jepson <daniel.jepson@ni.com> Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com> Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com> Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com> Co-authored-by: Max Köhler <max.koehler@ni.com> Co-authored-by: Michael Auchter <michael.auchter@ni.com> Co-authored-by: Paul Butler <paul.butler@ni.com> Co-authored-by: Wade Fife <wade.fife@ettus.com> Co-authored-by: Hector Rubio <hrubio@ni.com> Original-commit: 6d3765605262016a80f71e36357f749ea35cbe5a
46 lines
2.2 KiB
Systemverilog
46 lines
2.2 KiB
Systemverilog
//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: rfdc_timing_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// NCO_RESET_REG : 0x0 (rfdc_timing_control.v)
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// GEARBOX_RESET_REG : 0x4 (rfdc_timing_control.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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//===============================================================================
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// Register Group RFDC_TIMING_REGS
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//===============================================================================
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// NCO_RESET_REG Register (from rfdc_timing_control.v)
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localparam NCO_RESET_REG = 'h0; // Register Offset
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localparam NCO_RESET_REG_SIZE = 32; // register width in bits
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localparam NCO_RESET_REG_MASK = 32'h3;
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localparam NCO_RESET_START_SIZE = 1; //NCO_RESET_REG:NCO_RESET_START
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localparam NCO_RESET_START_MSB = 0; //NCO_RESET_REG:NCO_RESET_START
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localparam NCO_RESET_START = 0; //NCO_RESET_REG:NCO_RESET_START
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localparam NCO_RESET_DONE_SIZE = 1; //NCO_RESET_REG:NCO_RESET_DONE
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localparam NCO_RESET_DONE_MSB = 1; //NCO_RESET_REG:NCO_RESET_DONE
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localparam NCO_RESET_DONE = 1; //NCO_RESET_REG:NCO_RESET_DONE
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// GEARBOX_RESET_REG Register (from rfdc_timing_control.v)
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localparam GEARBOX_RESET_REG = 'h4; // Register Offset
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localparam GEARBOX_RESET_REG_SIZE = 32; // register width in bits
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localparam GEARBOX_RESET_REG_MASK = 32'h3;
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localparam ADC_RESET_SIZE = 1; //GEARBOX_RESET_REG:ADC_RESET
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localparam ADC_RESET_MSB = 0; //GEARBOX_RESET_REG:ADC_RESET
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localparam ADC_RESET = 0; //GEARBOX_RESET_REG:ADC_RESET
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localparam DAC_RESET_SIZE = 1; //GEARBOX_RESET_REG:DAC_RESET
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localparam DAC_RESET_MSB = 1; //GEARBOX_RESET_REG:DAC_RESET
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localparam DAC_RESET = 1; //GEARBOX_RESET_REG:DAC_RESET
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