16c1235b30acea81de5980c97d07f23d119df9fe
Original-commit: 002ff9698e09b94c396736613e493f79e9c56442
Languages
Verilog
42.5%
VHDL
13%
SystemVerilog
12%
HTML
11.1%
C
9.6%
Other
11.6%