Wade Fife
1586d6c730
Run "make ip" in a separate step for each testbench. This allows some testbenches to work better with ModelSim because it needs IP files that aren't known until after the IP is generated. Make run_testbenches.py more log friendly. Add a -l/--logged option for when the output is being logged. In this case, we don't want to display elapsed time every second. Add "Begin TB Log:" and "End TB Log:" to the output to more easily tell where the output from one testbench ends and another begins. Use the basedir argument as the base directory in which to search for testbenches so that a subset of the repo can be easily specified. Original-commit: 5a4f0470919440819ab71f44fbc6f5f89a671e41
Packaging FPGA (and other) images
Run package_images.py from the directory where the images are stored.