33 lines
1.1 KiB
Makefile
33 lines
1.1 KiB
Makefile
#
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# Copyright 2023 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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include $(TOOLS_DIR)/make/viv_ip_builder.mak
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IP_AXI_INTER_1X128_512_ORIG_SRCS = $(addprefix $(IP_DIR)/axi_inter_1x128_512_bd/, \
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axi_inter_1x128_512_bd.tcl \
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)
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IP_AXI_INTER_1X128_512_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_inter_1x128_512_bd/, \
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axi_inter_1x128_512_bd.tcl \
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)
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IP_AXI_INTER_1X128_512_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/axi_inter_1x128_512_bd/, \
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axi_inter_1x128_512_bd/axi_inter_1x128_512_bd.bd \
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)
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BD_AXI_INTER_1X128_512_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/axi_inter_1x128_512_bd/, \
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axi_inter_1x128_512_bd.bd.out \
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axi_inter_1x128_512_bd/axi_inter_1x128_512_bd_ooc.xdc \
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axi_inter_1x128_512_bd/synth/axi_inter_1x128_512_bd.v \
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)
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.INTERMEDIATE: IP_AXI_INTER_1X128_512_BD_TRGT
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$(IP_AXI_INTER_1X128_512_BD_SRCS) $(BD_AXI_INTER_1X128_512_BD_OUTS) $(IP_AXI_INTER_1X128_512_BDTCL_SRCS): IP_AXI_INTER_1X128_512_BD_TRGT
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@:
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IP_AXI_INTER_1X128_512_BD_TRGT: $(IP_AXI_INTER_1X128_512_ORIG_SRCS)
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$(call BUILD_VIVADO_BDTCL,axi_inter_1x128_512_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(LIB_DIR)/vivado_ipi)
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