miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
403 Commits 1 Branch 0 Tags
e9a6fe4e2e6c2b520ab718bc4cda1b60b3a3d1eb
Commit Graph
1 Commits
Author SHA1 Message Date
Wade Fife 0e65ae3c86 fpga: x400: Add 1x64, 2x64, and 1x128 DRAM interconnect 
Original-commit: daf1ed2ad2fbb72f16a9909fa75a0ba9e2879583
 2023-02-24 08:07:17 -06:00