Commit Graph
4 Commits
Author SHA1 Message Date
Wade Fife 16c1235b30 fpga: Update all RFNoC images
Original-commit: 002ff9698e09b94c396736613e493f79e9c56442
2022-03-31 13:51:23 -07:00
Wade Fife 4784032014 fpga: n3xx: Add missing BIST image core headers
Original-commit: 958eab7ea804337bd904c119427d363a05aa5cf6
2022-03-29 14:45:04 -05:00
Wade Fife 43e32abd11 fpga: Update rfnoc_image_core for all targets
Update rfnoc_image_core.v to take into account the new image_core_name
fields and version strings. Add new rfnoc_image_core.vh. Update YAML
where needed.


Original-commit: b0033158a4c520063540881451d8daac91e98714
2021-06-10 11:56:58 -05:00
steviez 3bbc81bb44 fpga: n320: Add BIST (AA) image files
This adds new image files which come with a DRAM FIFO. The addition of
an N320 image with a DRAM FIFO allows DDR3 BIST to be run on an
assembled (motherboard + daughterboard) N320.

This image is intentionally very similar to the N300_AA and N310_AA
targets which serve the same purpose of providing an image with a DRAM
FIFO for their respective devices.


Original-commit: ae2b9bf7aeea6f8f98f6dacffdfc018d87107927
2020-07-31 14:32:54 -05:00