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c5a4ea2f0e191503e7aeffaa5b7b60c5b5a07c69
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Author SHA1 Message Date
Wade Fife 2a74e8cd67 fpga: lib: Add RegPort SystemVerilog interface 
Original-commit: d628c136a0cca7dddc47711f86f52f2c9e2ca089
 2022-08-29 17:01:45 -05:00