Commit Graph
2 Commits
Author SHA1 Message Date
Wade Fife b2684c42a7 fpga: e31x: Fix DRAM traffic gen IP name
Change name in DRAM IP Makefile from IP_MIG_7SERIES_TG_SRCS to
IP_DDR3_16BIT_TG_SRCS to match the naming of other variables.


Original-commit: febf339e0df412e54cf43a204c280128d8ca1ec3
2022-03-23 08:55:36 -05:00
Wade Fife c322899053 fpga: e31x: Add DRAM support
This adds DRAM support to E31x devices. Due to the size of the DDR3
memory controller, it is not enabled by default. You can include the
memory controller IP in the build by adding the DRAM environment
variable to your build. For example:

DRAM=1 make E310_SG3


Original-commit: 788fef11ef890c6dcee3be495fc381bcf2990d3b
2022-02-10 18:13:44 -07:00