Commit Graph
12 Commits
Author SHA1 Message Date
Wade Fife 37b8b0d017 fpga: rfnoc: Move synthesizable code from sim to lib
Original-commit: d9f8c08dfb1afe98c35c5911125c6eead869713f
2025-03-17 17:47:16 -05:00
Wade Fife 9ed8bb22d6 fpga: lib: Fix Vivado warnings
Original-commit: ad3d614426e068a067692df411412ce3ed936c39
2023-06-09 09:01:04 -05:00
Wade Fife ff3ea516cb fpga: lib: rfnoc: Remove redundant packet gate
Both the chdr_stream_output and chdr_xb_ingress_buff have a packet
gate, making one of them somewhat redundant. Removing one of them
reduces latency and frees up FPGA resources.


Original-commit: 9533bd025d74787d25b135d3092bffa1b51f6731
2023-02-24 08:07:17 -06:00
Wade Fife d671f408c0 fpga: lib: rfnoc: Make RFNoC packet gates removable
This adds a parameter to chdr_xb_ingress_buff and to chdr_stream_output
to make their packet gates optional. They are included by default.

Having the packet gate in chdr_xb_ingress_buff can reduce contention in
the crossbar. Having the packet gate in chdr_stream_output can reduce
the latency for non-data packets (e.g., stream status updates).


Original-commit: 67e0a5a340c14cb0c6ee170fb17be2c09737d723
2023-02-24 08:07:17 -06:00
Wade Fife fd87d4cf30 fpga: lib: rfnoc: Support multiple port widths on crossbar
This adds support for different widths on each port and adds the
ability to disable routes within the crossbar. Both of these features
allow for FPGA resource savings.

These features are controlled by the new parameters PORT_WIDTHS and
ENABLED_PATHS. Unused routes will have the associated logic removed.

A new testbench adds support for testing different port widths and
disabled routes. It also adds more rigrous testing of the crossbar.


Original-commit: 18bf81d91055b68765c44ca86a2cbcfa9704c749
2023-02-24 08:07:17 -06:00
Wade Fife 165498c186 fpga: rfnoc: Add labels to axi_switch generate blocks
Original-commit: e18c0ffbc4d1cbe1c0f083185212d57a6c201716
2021-10-28 23:15:41 -05:00
Wade Fife 4e769632be fpga: rfnoc: Add documentation to chdr_xb_routing_table
Original-commit: 7dc2b620f7cb9dc72b9b77ce9c018823a4015b4e
2021-10-28 23:15:41 -05:00
Wade Fife 0c6f2627a5 fpga: lib: Fix lint warnings
Fixes various synthesis/simulation warnings that were being generated
due to incorrectly sized constants.


Original-commit: 00f683c91486647f1711eb4c0b0a917078d29652
2020-08-28 15:02:41 -05:00
Andrew Moch 55881469ac fpga: rfnoc: Add support for 512-bit CHDR widths
This fixes the rfnoc_null_src_sink, chdr_crossbar_nxn, and
chdr_stream_endpoint blocks so that wider CHDR widths are properly
supported. It also updates PkgChdrBfm to able to properly test these
blocks. The testbenches have been updated to test both 64 and 512-bit
widths.


Original-commit: 3af8dcaacfa4bf36dcae3bdbf0b353385b7063c6
2020-06-18 09:09:34 -05:00
Wade Fife c33b3779f9 fpga: Change default MTU to 10
Original-commit: 7b7fa68880ca423ea3a47fc3dc97ba533921c9a5
2020-05-11 09:06:03 -05:00
Andrew Moch 97dcb5363d fpga: Fix errors found by linting with vsim
Original-commit: 5c7237fb407cfccaee205980d97e40ce10768c2a
2020-03-23 08:23:51 -05:00
+18 6b67702ad7 Merge FPGA repository back into UHD repository
The FPGA codebase was removed from the UHD repository in 2014 to reduce
the size of the repository. However, over the last half-decade, the
split between the repositories has proven more burdensome than it has
been helpful. By merging the FPGA code back, it will be possible to
create atomic commits that touch both FPGA and UHD codebases. Continuous
integration testing is also simplified by merging the repositories,
because it was previously difficult to automatically derive the correct
UHD branch when testing a feature branch on the FPGA repository.

This commit also updates the license files and paths therein.

We are therefore merging the repositories again. Future development for
FPGA code will happen in the same repository as the UHD host code and
MPM code.

== Original Codebase and Rebasing ==

The original FPGA repository will be hosted for the foreseeable future
at its original local location: https://github.com/EttusResearch/fpga/

It can be used for bisecting, reference, and a more detailed history.

The final commit from said repository to be merged here is
05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as
v4.0.0.0-pre-uhd-merge.

If you have changes in the FPGA repository that you want to rebase onto
the UHD repository, simply run the following commands:

- Create a directory to store patches (this should be an empty
  directory):

    mkdir ~/patches

- Now make sure that your FPGA codebase is based on the same state as
  the code that was merged:

    cd src/fpga # Or wherever your FPGA code is stored
    git rebase v4.0.0.0-pre-uhd-merge

  Note: The rebase command may look slightly different depending on what
  exactly you're trying to rebase.

- Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge:

    git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches

  Note: Make sure that only patches are stored in your output directory.
  It should otherwise be empty. Make sure that you picked the correct
  range of commits, and only commits you wanted to rebase were exported
  as patch files.

- Go to the UHD repository and apply the patches:

    cd src/uhd # Or wherever your UHD repository is stored
    git am --directory fpga ~/patches/*
    rm -rf ~/patches # This is for cleanup

== Contributors ==

The following people have contributed mainly to these files (this list
is not complete):

Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Andrej Rode <andrej.rode@ettus.com>
Co-authored-by: Ashish Chaudhari <ashish@ettus.com>
Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ettus.com>
Co-authored-by: EJ Kreinar <ej@he360.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Ian Buckley <ian.buckley@gmail.com>
Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Jon Kiser <jon.kiser@ni.com>
Co-authored-by: Josh Blum <josh@joshknows.com>
Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Matt Ettus <matt@ettus.com>
Co-authored-by: Michael West <michael.west@ettus.com>
Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com>
Co-authored-by: Nick Foster <nick@ettus.com>
Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Paul David <paul.david@ettus.com>
Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com>
Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-authored-by: Sylvain Munaut <tnt@246tNt.com>
Co-authored-by: Trung Tran <trung.tran@ettus.com>
Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>


Original-commit: bafa9d95453387814ef25e6b6256ba8db2df612f
2020-01-28 09:35:36 -08:00