miegl/b210-k7-fpga
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77d07a971440ba0713c109cee1973cfdc1ba69db
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Author SHA1 Message Date
Ryan Marlow a90444c784 fpga: lib: Add clock_div module 
Module description:
Clock divider. Generates an output clock that is 1/N times the
frequency of the input clock.


Original-commit: 71bdcd22f07162687771d374178ad0372783bd45
 2023-04-05 15:10:14 -05:00