The existing SPI core (simple_spi_slave.v) was limited to 32 bit. This
commit adds a second spi core with capability to transfer up to 64 bits
while keeping the same amount of resources when using generic setting
MAX_BITS = 32. Furthermore, the new module aligns mosi and miso with the
edges of sclk. The register stages were not aligned in the existing
version.
Original-commit: 366cab1fef44f1132a2acf8046ecaeac80793ccc
