miegl/b210-k7-fpga
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03abebec265dc1a7b63103ccf297b9dbcd7bc2ec
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3 Commits
Author SHA1 Message Date
Javier Valenzuela 381c7d4d9c fpga: x400: zbx: cpld: Bump ZBX regmap copyright 
Original-commit: 6bb7dffa4f0e16d5c51c69fb56af152dabf71236
 2022-02-10 09:57:56 -07:00
Humberto Jimenez 4082066a6f fpga: x400: Refactor CPLDs build process 
This commit refactors the X410's CPLDs build process to make it similar to other
FPGA targets within the repo. The new process relies on basic Quartus build
utilities.
Additionally, this commit adds support for an alternative MAX10 CPLD for the
motherboard CPLD implementation. Both previous (10M04) and new variant
(10M08) are supported concurrently. The images package mapping is updated to
reflect these changes.


Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
 2021-12-01 10:51:07 -06:00
Javier ValenzuelaCherwa VangMartin BraunMax KöhlerPaul Butler
 		a1d7c252c2 fpga: x400: zbx: Add support for ZBX CPLD 
Co-authored-by: Cherwa Vang <cherwa.vang@ni.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>


Original-commit: 99b841c75aa91709090cbf4046bf51b7ffb4f612
 2021-06-10 11:56:58 -05:00