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fpga: x4xx: Refactor MB CPLD code for future devices

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Original-commit: e2a79712a7949ffec88135236c744dc5d8bde217
This commit is contained in:
Javier Valenzuela
2023-05-23 09:05:27 +02:00
committed by Martin Braun
parent e9a6fe4e2e
commit ffdcc016cc
33 changed files with 5895 additions and 14 deletions
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top/x400/cpld/regmap/i2c_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: jtag_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// ID EEPROM : 0x0 : 0x50 (ctrlport_to_i2c.v)
// Top Side Temp Sensor : 0x4 : 0x48 (ctrlport_to_i2c.v)
// Bottom Side Temp Sensor : 0x8 : 0x49 (ctrlport_to_i2c.v)
// LED GPIO Expander : 0xC : 0x20 (ctrlport_to_i2c.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group JTAG_REGS TODO update these
//===============================================================================
// TX_DATA Register (from ctrlport_to_jtag.v)
localparam ID_EEPROM = 'h0; // Register Offset
localparam TX_DATA_SIZE = 32; // register width in bits
localparam TX_DATA_MASK = 32'h0;
// STB_DATA Register (from ctrlport_to_jtag.v)
localparam STB_DATA = 'h4; // Register Offset
localparam STB_DATA_SIZE = 32; // register width in bits
localparam STB_DATA_MASK = 32'h0;
// CONTROL Register (from ctrlport_to_jtag.v)
localparam CONTROL = 'h8; // Register Offset
localparam CONTROL_SIZE = 32; // register width in bits
localparam CONTROL_MASK = 32'h80001FFF;
localparam PRESCALAR_SIZE = 8; //CONTROL:prescalar
localparam PRESCALAR_MSB = 7; //CONTROL:prescalar
localparam PRESCALAR = 0; //CONTROL:prescalar
localparam LENGTH_SIZE = 5; //CONTROL:length
localparam LENGTH_MSB = 12; //CONTROL:length
localparam LENGTH = 8; //CONTROL:length
localparam RESET_SIZE = 1; //CONTROL:reset
localparam RESET_MSB = 31; //CONTROL:reset
localparam RESET = 31; //CONTROL:reset
localparam READY_SIZE = 1; //CONTROL:ready
localparam READY_MSB = 31; //CONTROL:ready
localparam READY = 31; //CONTROL:ready
// RX_DATA Register (from ctrlport_to_jtag.v)
localparam RX_DATA = 'hC; // Register Offset
localparam RX_DATA_SIZE = 32; // register width in bits
localparam RX_DATA_MASK = 32'h0;
top/x400/cpld/regmap/jtag_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/mb_cpld_ps_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/pl_cpld_base_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/ps_cpld_base_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/ps_power_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/reconfig_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/spi_regmap_utils.vh
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//
// Copyright 2022 Ettus Research, A National Instruments Company
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
top/x400/cpld/regmap/x410/constants_regmap_utils.vh
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//
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: constants_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group CONSTANTS_GROUP
//===============================================================================
// Enumerated type CONSTANTS_ENUM
localparam CONSTANTS_ENUM_SIZE = 4;
localparam PS_CPLD_SIGNATURE = 'hA522D27; // CONSTANTS_ENUM:PS_CPLD_SIGNATURE
localparam OLDEST_CPLD_REVISION = 'h20122114; // CONSTANTS_ENUM:OLDEST_CPLD_REVISION
localparam CPLD_REVISION = 'h22080414; // CONSTANTS_ENUM:CPLD_REVISION
localparam PL_CPLD_SIGNATURE = 'h3FDC5C47; // CONSTANTS_ENUM:PL_CPLD_SIGNATURE
top/x400/cpld/regmap/x410/mb_cpld_pl_regmap_utils.vh
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//
// Copyright 2023 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: mb_cpld_pl_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// PL_REGISTERS : 0x0 (mb_cpld.v)
// JTAG_DB0 : 0x60 (mb_cpld.v)
// JTAG_DB1 : 0x80 (mb_cpld.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group MB_CPLD_PL_WINDOWS
//===============================================================================
// PL_REGISTERS Window (from mb_cpld.v)
localparam PL_REGISTERS = 'h0; // Window Offset
localparam PL_REGISTERS_SIZE = 'h40; // size in bytes
// JTAG_DB0 Window (from mb_cpld.v)
localparam JTAG_DB0 = 'h60; // Window Offset
localparam JTAG_DB0_SIZE = 'h20; // size in bytes
// JTAG_DB1 Window (from mb_cpld.v)
localparam JTAG_DB1 = 'h80; // Window Offset
localparam JTAG_DB1_SIZE = 'h20; // size in bytes