Pushing the bulk of UHD-3.7.0 code.

Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
This commit is contained in:
Ben Hilburn
2014-02-14 12:05:07 -08:00
parent 29086f9001
commit fbbc991a7d
2194 changed files with 1489297 additions and 1084 deletions
+332
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//------------------------------------------------------------------------------
// File : demo_tb.v
// Author : Xilinx Inc.
//------------------------------------------------------------------------------
// (c) Copyright 2009 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
// laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant any
// rights to the materials distributed herewith. Except as
// otherwise provided in a valid license issued to you by
// Xilinx, and to the maximum extent permitted by applicable
// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
// (2) Xilinx shall not be liable (whether in contract or tort,
// including negligence, or under any other theory of
// liability) for any loss or damage of any kind or nature
// related to, arising under or in connection with these
// materials, including for any direct, or any indirect,
// special, incidental, or consequential loss or damage
// (including loss of data, profits, goodwill, or any type of
// loss or damage suffered as a result of any action brought
// by a third party) even if such damage or loss was
// reasonably foreseeable or Xilinx had been advised of the
// possibility of the same.
//
// CRITICAL APPLICATIONS
// Xilinx products are not designed or intended to be fail-
// safe, or for use in any application requiring fail-safe
// performance, such as life-support or safety devices or
// systems, Class III medical devices, nuclear facilities,
// applications related to the deployment of airbags, or any
// other applications that could lead to death, personal
// injury, or severe property or environmental damage
// (individually and collectively, "Critical
// Applications"). Customer assumes the sole risk and
// liability of any use of Xilinx products in Critical
// Applications, subject only to applicable laws and
// regulations governing limitations on product liability.
//
// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
// PART OF THIS FILE AT ALL TIMES.
//
//
//------------------------------------------------------------------------------
// Description: This testbench will exercise the ports of the Ethernet
// 1000BASE-X PCS/PMA core's example design to perform the following
// operations:
//
//----------------
// Configuration
//----------------
// The core will be reset, then Auto-Negotiation (if present) will
// be disabled and and the core will be taken out of the Isolate
// state.
//
//----------------
// Transmitter
//----------------
// Four frames are generated by the Tx Stimulus and pushed into the
// GMII transmitter.
//
// The PHY side transmitter interface data is captured, 8B10B decoded
// and the Tx Monitor checks that the captured data matches that
// injected.
//
//----------------
// Receiver
//----------------
// Four frames are generated by the Rx Stimulus, 8B10B encoded and
// pushed into the PHY side receiver interface.
//
// The GMII side receiver interface data is captured and the
// Rx Monitor checks that the captured data matches that injected.
//
//
//----------------------------------------------------------------------
// Demonstration Test Fixture |
// |
// |
// -------------------------- |
// | Example Design | |
// | (DUT) | |
// | | |
// | | |
// | | |
// Tx | | 8B10B decode, Tx |
// Generate -------> --------> Monitor |
// Frames | | Frames |
// |GMII PHY | |
// | I/F I/F | |
// | | |
// | | |
// | | |
// Rx | | 8B10B encode, Rx |
// Monitor <-------- <-------- Generate |
// Frames | | Frames |
// | | |
// ------------^------------- |
// | |
// | |
// Stimulate |
// MDIO I/F |
// (if present) |
// |
//----------------------------------------------------------------------
`timescale 1 ps/1 ps
// This module is the demonstration testbench
module demo_tb;
//----------------------------------------------------------------------------
// testbench signals
//----------------------------------------------------------------------------
// testbench control semaphores
reg configuration_finished;
wire tx_monitor_finished;
wire rx_monitor_finished;
wire simulation_finished;
//----------------------------------------------------------------------------
// DUT signals
//----------------------------------------------------------------------------
// An independent clock source used as the reference clock for an
// IDELAYCTRL (if present) and for the main GT transceiver reset logic.
// This example design assumes that this is of frequency 200MHz.
reg independent_clock;
// System Reset
reg reset;
// Transceiver Interface
//----------------------
reg gtrefclk_p;
reg gtrefclk_n;
wire txp;
wire txn;
wire rxp;
wire rxn;
// GMII Interface
//---------------
wire gmii_tx_clk;
wire gmii_rx_clk;
wire [7:0] gmii_txd;
wire gmii_tx_en;
wire gmii_tx_er;
wire [7:0] gmii_rxd;
wire gmii_rx_dv;
wire gmii_rx_er;
// Management: Alternative to MDIO Interface
//------------------------------------------
reg [4:0] configuration_vector;
wire signal_detect;
wire [15:0] status_vector;
//----------------------------------------------------------------------------
// Create clock sources
//----------------------------------------------------------------------------
// An independent clock source used as the reference clock for an
// IDELAYCTRL (if present) and for the main GT transceiver reset logic.
// This testbench uses the frequency of 200MHz.
initial
begin
independent_clock <= 1'b0;
forever
begin
independent_clock <= 1'b0;
#2500;
independent_clock <= 1'b1;
#2500;
end
end
// Create the transceiver Reference clock (125 MHz)
initial
begin
gtrefclk_p <= 1'b0;
gtrefclk_n <= 1'b1;
forever
begin
gtrefclk_p <= 1'b0;
gtrefclk_n <= 1'b1;
#4000;
gtrefclk_p <= 1'b1;
gtrefclk_n <= 1'b0;
#4000;
end
end
//----------------------------------------------------------------------------
// Wire up Device Under Test
//----------------------------------------------------------------------------
gige_sfp_example_design dut
(
.independent_clock (independent_clock),
.gtrefclk_p (gtrefclk_p),
.gtrefclk_n (gtrefclk_n),
.txp (txp),
.txn (txn),
.rxp (rxp),
.rxn (rxn),
.gmii_tx_clk (gmii_tx_clk),
.gmii_rx_clk (gmii_rx_clk),
.gmii_txd (gmii_txd),
.gmii_tx_en (gmii_tx_en),
.gmii_tx_er (gmii_tx_er),
.gmii_rxd (gmii_rxd),
.gmii_rx_dv (gmii_rx_dv),
.gmii_rx_er (gmii_rx_er),
.configuration_vector (configuration_vector),
.status_vector (status_vector),
.reset (reset),
.signal_detect (signal_detect)
);
//----------------------------------------------------------------------------
// Instantiate a Stimulus module for the core
//----------------------------------------------------------------------------
stimulus_tb stimulus
(
.txp (txp),
.txn (txn),
.rxp (rxp),
.rxn (rxn),
.gmii_tx_clk (gmii_tx_clk),
.gmii_rx_clk (gmii_rx_clk),
.gmii_txd (gmii_txd),
.gmii_tx_en (gmii_tx_en),
.gmii_tx_er (gmii_tx_er),
.gmii_rxd (gmii_rxd),
.gmii_rx_dv (gmii_rx_dv),
.gmii_rx_er (gmii_rx_er),
.configuration_finished (configuration_finished),
.tx_monitor_finished (tx_monitor_finished),
.rx_monitor_finished (rx_monitor_finished)
);
//----------------------------------------------------------------------------
// Simulate that PMD sublayer has detected and optical input.
//----------------------------------------------------------------------------
assign signal_detect = 1'b1;
//----------------------------------------------------------------------------
// Set the configuration for the core. Any of the bits within
// "configuration_vector" can be changed dynamically.
// The core is then reset
//----------------------------------------------------------------------------
initial
begin : p_configuration
$display("** Note: Timing checks are not valid");
configuration_finished <= 0;
configuration_vector[1:0] <= 2'h0; // Disable Loopback
configuration_vector[2] <= 1'b0; // Disable POWERDOWN
configuration_vector[3] <= 1'b0; // Disable ISOLATE
configuration_vector[4] <= 1'b0; // Enable Auto-Neg
// reset the core
$display("Resetting core...");
reset <= 1'b1;
#1000000
reset <= 1'b0;
// wait for core to obtain synchronisation
wait (status_vector[1] == 1);
#20000000
@(posedge gtrefclk_p)
configuration_finished <= 1;
end // p_configuration
//----------------------------------------------------------------------------
// End the simulation.
//----------------------------------------------------------------------------
assign simulation_finished = tx_monitor_finished & rx_monitor_finished;
initial
begin : p_end_simulation
fork: sim_in_progress
@(posedge simulation_finished) disable sim_in_progress;
#200000000 disable sim_in_progress;
join
if (simulation_finished)
#1000000
$display("Simulation Complete.");
else
$display("** Error: Testbench timed out");
$stop;
end // p_end_simulation
endmodule
@@ -0,0 +1,28 @@
vlib work
vmap work work
echo "Compiling Core Simulation Models"
vlog -work work ../../../gige_sfp.v
echo "Compiling Example Design"
vlog -work work \
../../example_design/gige_sfp_sync_block.v \
../../example_design/gige_sfp_reset_sync.v \
../../example_design/transceiver/gige_sfp_gtwizard_gt.v \
../../example_design/transceiver/gige_sfp_gtwizard.v \
../../example_design/transceiver/gige_sfp_tx_startup_fsm.v \
../../example_design/transceiver/gige_sfp_rx_startup_fsm.v \
../../example_design/transceiver/gige_sfp_gtwizard_init.v \
../../example_design/transceiver/gige_sfp_transceiver.v \
../../example_design/gige_sfp_tx_elastic_buffer.v \
../../example_design/gige_sfp_block.v \
../../example_design/gige_sfp_example_design.v
echo "Compiling Test Bench"
vlog -work work -novopt ../stimulus_tb.v ../demo_tb.v
echo "Starting simulation"
vsim -voptargs="+acc" -L unisims_ver -L secureip -t ps work.demo_tb work.glbl
do wave_mti.do
run -all
@@ -0,0 +1,28 @@
#!/bin/sh
mkdir work
echo "Compiling Core Simulation Models"
ncvlog -work work ../../../gige_sfp.v
echo "Compiling Example Design"
ncvlog -work work \
../../example_design/gige_sfp_sync_block.v \
../../example_design/gige_sfp_reset_sync.v \
../../example_design/transceiver/gige_sfp_gtwizard_gt.v \
../../example_design/transceiver/gige_sfp_gtwizard.v \
../../example_design/transceiver/gige_sfp_tx_startup_fsm.v \
../../example_design/transceiver/gige_sfp_rx_startup_fsm.v \
../../example_design/transceiver/gige_sfp_gtwizard_init.v \
../../example_design/transceiver/gige_sfp_transceiver.v \
../../example_design/gige_sfp_tx_elastic_buffer.v \
../../example_design/gige_sfp_block.v \
../../example_design/gige_sfp_example_design.v
echo "Compiling Test Bench"
ncvlog -work work ../stimulus_tb.v ../demo_tb.v
echo "Elaborating design"
ncelab -access +rw work.demo_tb glbl
echo "Starting simulation"
ncsim -gui work.demo_tb -input @"simvision -input wave_ncsim.sv"
@@ -0,0 +1,30 @@
#!/bin/sh
rm -rf simv* csrc DVEfiles AN.DB
echo "Compiling Core Simulation Models"
vlogan +v2k \
../../../gige_sfp.v \
../../example_design/gige_sfp_sync_block.v \
../../example_design/gige_sfp_reset_sync.v \
../../example_design/transceiver/gige_sfp_gtwizard_gt.v \
../../example_design/transceiver/gige_sfp_gtwizard.v \
../../example_design/transceiver/gige_sfp_tx_startup_fsm.v \
../../example_design/transceiver/gige_sfp_rx_startup_fsm.v \
../../example_design/transceiver/gige_sfp_gtwizard_init.v \
../../example_design/transceiver/gige_sfp_transceiver.v \
../../example_design/gige_sfp_tx_elastic_buffer.v \
../../example_design/gige_sfp_block.v \
../../example_design/gige_sfp_example_design.v \
../stimulus_tb.v \
../demo_tb.v
echo "Elaborating design"
vcs +vcs+lic+wait \
-debug \
demo_tb glbl
echo "Starting simulation"
./simv -ucli -i ucli_commands.key
dve -vpd vcdplus.vpd -session vcs_session.tcl
@@ -0,0 +1,4 @@
call {$vcdpluson}
run
call {$vcdplusclose}
quit
@@ -0,0 +1,27 @@
gui_open_window Wave
gui_list_select -id Hier.1 { glbl demo_tb }
gui_sg_create PCS_PMA_group
gui_list_add_group -id Wave.1 {PCS_PMA_group}
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Test_semaphores }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Rx_Stimulus }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Tx_Monitor }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Transceiver_Rx_Signals }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Transceiver_Tx_Signals }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Rx_GMII_Signals }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Tx_GMII_Signals }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { Management_Signals }
gui_list_add_divider -id Wave.1 -after PCS_PMA_group { System_Signals }
gui_list_add -id Wave.1 -after System_Signals {{demo_tb.gtrefclk_p} {demo_tb.gtrefclk_n}}
gui_list_add -id Wave.1 -after System_Signals {demo_tb.signal_detect}
gui_list_add -id Wave.1 -after Management_Signals {{demo_tb.status_vector}}
gui_list_add -id Wave.1 -after Tx_GMII_Signals {{demo_tb.gmii_txd} {demo_tb.gmii_tx_en} {demo_tb.gmii_tx_er}}
gui_list_add -id Wave.1 -after Rx_GMII_Signals {{demo_tb.gmii_rxd} {demo_tb.gmii_rx_dv} {demo_tb.gmii_rx_er}}
gui_list_add -id Wave.1 -after Transceiver_Tx_Signals {{demo_tb.txp} {demo_tb.txn}}
gui_list_add -id Wave.1 -after Transceiver_Rx_Signals {{demo_tb.rxp} {demo_tb.rxn}}
gui_list_add -id Wave.1 -after Tx_Monitor {{demo_tb.stimulus.mon_tx_clk} {demo_tb.stimulus.tx_pdata} {demo_tb.stimulus.tx_is_k}}
gui_list_add -id Wave.1 -after Tx_Monitor {{demo_tb.stimulus.bitclock}}
gui_list_add -id Wave.1 -after Rx_Stimulus {{demo_tb.stimulus.stim_rx_clk} {demo_tb.stimulus.rx_even} {demo_tb.stimulus.rx_pdata} {demo_tb.stimulus.rx_is_k} {demo_tb.stimulus.rx_rundisp_pos}}
gui_list_add -id Wave.1 -after Test_semaphores {{demo_tb.configuration_finished} {demo_tb.tx_monitor_finished} {demo_tb.rx_monitor_finished} {demo_tb.simulation_finished}}
gui_zoom -window Wave.1 -full
@@ -0,0 +1,44 @@
view structure
view signals
view wave
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider {System Signals}
add wave -noupdate -format logic /demo_tb/reset
add wave -noupdate -format logic /demo_tb/gtrefclk_p
add wave -noupdate -format logic /demo_tb/gtrefclk_n
add wave -noupdate -format logic /demo_tb/signal_detect
add wave -noupdate -divider {Management I/F}
add wave -noupdate -format logic -binary /demo_tb/status_vector
add wave -noupdate -divider {Tx GMII}
add wave -noupdate -format logic -hex /demo_tb/gmii_txd
add wave -noupdate -format logic /demo_tb/gmii_tx_en
add wave -noupdate -format logic /demo_tb/gmii_tx_er
add wave -noupdate -divider {Rx GMII}
add wave -noupdate -format logic -hex /demo_tb/gmii_rxd
add wave -noupdate -format logic /demo_tb/gmii_rx_dv
add wave -noupdate -format logic /demo_tb/gmii_rx_er
add wave -noupdate -divider {Transceiver Tx}
add wave -noupdate -format logic /demo_tb/txp
add wave -noupdate -format logic /demo_tb/txn
add wave -noupdate -divider {Transceiver Rx}
add wave -noupdate -format logic /demo_tb/rxp
add wave -noupdate -format logic /demo_tb/rxn
add wave -noupdate -divider {Tx Monitor}
add wave -noupdate -format logic /demo_tb/stimulus/mon_tx_clk
add wave -noupdate -format logic -hex /demo_tb/stimulus/tx_pdata
add wave -noupdate -format logic /demo_tb/stimulus/tx_is_k
add wave -noupdate -format logic /demo_tb/stimulus/bitclock
add wave -noupdate -divider {Rx Stimulus}
add wave -noupdate -format logic /demo_tb/stimulus/stim_rx_clk
add wave -noupdate -format logic /demo_tb/stimulus/rx_even
add wave -noupdate -format logic -hex /demo_tb/stimulus/rx_pdata
add wave -noupdate -format logic /demo_tb/stimulus/rx_is_k
add wave -noupdate -format logic /demo_tb/stimulus/rx_rundisp_pos
add wave -noupdate -divider {Test semaphores}
add wave -noupdate -format logic /demo_tb/configuration_finished
add wave -noupdate -format logic /demo_tb/tx_monitor_finished
add wave -noupdate -format logic /demo_tb/rx_monitor_finished
add wave -noupdate -format logic /demo_tb/simulation_finished
TreeUpdate [SetDefaultTree]
@@ -0,0 +1,148 @@
# SimVision Command Script
#
# groups
#
if {[catch {group new -name {System Signals} -overlay 0}] != ""} {
group using {System Signals}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.reset \
demo_tb.gtrefclk_p \
demo_tb.gtrefclk_n
demo_tb.signal_detect \
if {[catch {group new -name {Management I/F} -overlay 0}] != ""} {
group using {Management I/F}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.status_vector
if {[catch {group new -name {Tx GMII} -overlay 0}] != ""} {
group using {Tx GMII}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
{demo_tb.gmii_txd[7:0]} \
demo_tb.gmii_tx_en \
demo_tb.gmii_tx_er
if {[catch {group new -name {Rx GMII} -overlay 0}] != ""} {
group using {Rx GMII}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
{demo_tb.gmii_rxd[7:0]} \
demo_tb.gmii_rx_dv \
demo_tb.gmii_rx_er
if {[catch {group new -name {Transceiver Tx} -overlay 0}] != ""} {
group using {Transceiver Tx}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.txp \
demo_tb.txn
if {[catch {group new -name {Transceiver Rx} -overlay 0}] != ""} {
group using {Transceiver Rx}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.rxp \
demo_tb.rxn
if {[catch {group new -name {Tx Monitor} -overlay 0}] != ""} {
group using {Tx Monitor}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.stimulus.mon_tx_clk \
{demo_tb.stimulus.tx_pdata[7:0]} \
demo_tb.stimulus.tx_is_k \
demo_tb.stimulus.bitclock
if {[catch {group new -name {Rx Stimulus} -overlay 0}] != ""} {
group using {Rx Stimulus}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.stimulus.stim_rx_clk \
demo_tb.stimulus.rx_even \
{demo_tb.stimulus.rx_pdata[7:0]} \
demo_tb.stimulus.rx_is_k \
demo_tb.stimulus.rx_rundisp_pos
if {[catch {group new -name {Test semaphores} -overlay 0}] != ""} {
group using {Test semaphores}
group set -overlay 0
group set -comment {}
group clear 0 end
}
group insert \
demo_tb.configuration_finished \
demo_tb.tx_monitor_finished \
demo_tb.rx_monitor_finished \
demo_tb.simulation_finished
#
# Waveform windows
#
if {[window find -match exact -name "Waveform 1"] == {}} {
window new WaveWindow -name "Waveform 1" -geometry 906x585+25+55
} else {
window geometry "Waveform 1" 906x585+25+55
}
window target "Waveform 1" on
waveform using {Waveform 1}
waveform sidebar visibility partial
waveform set \
-primarycursor TimeA \
-signalnames name \
-signalwidth 175 \
-units fs \
-valuewidth 75
cursor set -using TimeA -time 50,000,000,000fs
cursor set -using TimeA -marching 1
waveform baseline set -time 0
set groupId [waveform add -groups {{System Signals}}]
set groupId [waveform add -groups {{Management I/F}}]
set groupId [waveform add -groups {{Tx GMII}}]
set groupId [waveform add -groups {{Rx GMII}}]
set groupId [waveform add -groups {{Transceiver Tx}}]
set groupId [waveform add -groups {{Transceiver Rx}}]
set groupId [waveform add -groups {{Tx Monitor}}]
set groupId [waveform add -groups {{Rx Stimulus}}]
set groupId [waveform add -groups {{Test semaphores}}]
waveform xview limits 0fs 10us
simcontrol run -time 200us
File diff suppressed because it is too large Load Diff