Pushing the bulk of UHD-3.7.0 code.

Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
2014-02-14 12:05:07 -08:00
parent 29086f9001
commit fbbc991a7d
2194 changed files with 1489297 additions and 1084 deletions
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+This file includes the information about the PHY layer support:
+
+   - Folder "<component name>/user_design/rtl/phy" includes the PHY layer
+     RTL modules.
+   - The top-level PHY module to be instantiated is ddr_phy_top (ddr_phy_top.v)
+   - PHY modules can be used in any environment by taking the RTL modules
+     listed in "phy" folder and PHY layer needs to be connected to
+     the memory controller.
+   - Refer to User Guide (UG586) section "Physical Layer Interface (Non-Memory
+     Controller Design)" for more details on PHY interface signaling,
+     parameter(s) and timing information.