miegl/b210-k7-fpga
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Pushing the bulk of UHD-3.7.0 code.

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Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
This commit is contained in:
Ben Hilburn committed 2014-02-14 12:05:07 -08:00
1 parent 29086f9001
commit fbbc991a7d
2194 files changed
+1489297 -1084
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top/b200/coregen/chipscope_ila_128.xise
+2 -2
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@@ -17,11 +17,11 @@
<files>
<file xil_pn:name="chipscope_ila_128.ngc" xil_pn:type="FILE_NGC">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
<association xil_pn:name="Implementation" xil_pn:seqID="2"/>
<association xil_pn:name="Implementation" xil_pn:seqID="1"/>
</file>
<file xil_pn:name="chipscope_ila_128.v" xil_pn:type="FILE_VERILOG">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="3"/>
<association xil_pn:name="Implementation" xil_pn:seqID="3"/>
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="3"/>
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="3"/>
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="3"/>