Pushing the bulk of UHD-3.7.0 code.

Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
2014-02-14 12:05:07 -08:00
parent 29086f9001
commit fbbc991a7d
2194 changed files with 1489297 additions and 1084 deletions
@@ -22,6 +22,7 @@ include ../../lib/packet_proc/Makefile.srcs
 include ../../lib/timing/Makefile.srcs
 include ../../lib/vita/Makefile.srcs
 include ../../lib/wishbone/Makefile.srcs
+include ../../lib/axi/Makefile.srcs

 B200_COREGEN_SRCS = \
 coregen/b200_clk_gen.v \
@@ -76,7 +77,8 @@ $(GPIF2_SRCS) $(PACKET_PROC_SRCS) \
 $(WISHBONE_SRCS) \
 $(TIMING_SRCS) \
 $(DSP_SRCS) \
-$(VITA_SRCS)
+$(VITA_SRCS) \
+$(AXI_SRCS)

 ##################################################
 # Process Properties