Pushing the bulk of UHD-3.7.0 code.
Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// File name "tx_hold_fifo.v" ////
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//// ////
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//// This file is part of the "10GE MAC" project ////
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//// http://www.opencores.org/cores/xge_mac/ ////
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//// ////
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//// Author(s): ////
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//// - A. Tanguay (antanguay@opencores.org) ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2008 AUTHORS. All rights reserved. ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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`include "defines.v"
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module tx_hold_fifo(/*AUTOARG*/
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// Outputs
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txhfifo_wfull, txhfifo_walmost_full, txhfifo_rdata, txhfifo_rstatus,
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txhfifo_rempty, txhfifo_ralmost_empty,
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// Inputs
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clk_xgmii_tx, reset_xgmii_tx_n, txhfifo_wdata, txhfifo_wstatus,
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txhfifo_wen, txhfifo_ren
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);
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input clk_xgmii_tx;
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input reset_xgmii_tx_n;
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input [63:0] txhfifo_wdata;
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input [7:0] txhfifo_wstatus;
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input txhfifo_wen;
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input txhfifo_ren;
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output txhfifo_wfull;
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output txhfifo_walmost_full;
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output [63:0] txhfifo_rdata;
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output [7:0] txhfifo_rstatus;
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output txhfifo_rempty;
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output txhfifo_ralmost_empty;
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generic_fifo #(
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.DWIDTH (72),
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.AWIDTH (`TX_HOLD_FIFO_AWIDTH),
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.REGISTER_READ (1),
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.EARLY_READ (1),
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.CLOCK_CROSSING (0),
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.ALMOST_EMPTY_THRESH (7),
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.ALMOST_FULL_THRESH (4),
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// .MEM_TYPE (`MEM_AUTO_SMALL)
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.MEM_TYPE (`MEM_AUTO_XILINX)
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)
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fifo0(
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.wclk (clk_xgmii_tx),
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.wrst_n (reset_xgmii_tx_n),
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.wen (txhfifo_wen),
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.wdata ({txhfifo_wstatus, txhfifo_wdata}),
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.wfull (txhfifo_wfull),
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.walmost_full (txhfifo_walmost_full),
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.rclk (clk_xgmii_tx),
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.rrst_n (reset_xgmii_tx_n),
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.ren (txhfifo_ren),
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.rdata ({txhfifo_rstatus, txhfifo_rdata}),
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.rempty (txhfifo_rempty),
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.ralmost_empty (txhfifo_ralmost_empty)
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);
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endmodule
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