fpga: tools: Fix error detection in run_testbenches.py

This fixes recognition of $error and $fatal statements in the output of
XSim when running run_testbenches.py. XSim apparently prints a "shift
in" character (0x15) as part of its error statements, so the regular
expression was not matching.


Original-commit: ee36d7fabcf73f773edae00fbb1604a600db992d
This commit is contained in:
Wade Fife
2023-01-09 15:40:17 -06:00
parent e81f89128f
commit f9d20d2a7f
+1 -1
View File
@@ -157,7 +157,7 @@ def parse_output(simout):
# testbench or may occur in a subsequent instance, after a pass.
tb_match_error = ([
'\n',
'(Error|Fatal): .*\n',
'(Error|Fatal): .*\n.?',
'Time: .+\n',
])
m_error = re.search(''.join(tb_match_error), plain_simout)