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fpga: x440: refactor rf_core_full to use parameters on ports

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Original-commit: 40bd20d240b2ee60ec58ad5a00a9ec9eebd1e9af
This commit is contained in:
Max Köhler
2024-08-21 08:06:41 -05:00
committed by Wade Fife
parent 08f8b269fa
commit ea4f2ff009
10 changed files with 281 additions and 889 deletions
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top/x400/ip/Makefile.inc
-3
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@@ -34,7 +34,6 @@ include $(IP_DIR)/x4xx_ps_rfdc_bd/x410_ps_rfdc_bd/Makefile.inc
endif
ifdef X440
include $(IP_DIR)/adc_full_bd/Makefile.inc
include $(IP_DIR)/adc_100m_bd/Makefile.inc
include $(IP_DIR)/dac_100m_bd/Makefile.inc
include $(IP_DIR)/ddr4_64bits_x440/Makefile.inc
@@ -76,7 +75,6 @@ endif
ifdef X440
BD_SRCS += \
$(IP_ADC_FULL_BD_SRCS) \
$(IP_ADC_FULL_HDL_SRCS) \
$(IP_ADC_100M_BD_SRCS) \
$(IP_ADC_100M_HDL_SRCS) \
@@ -128,7 +126,6 @@ endif
ifdef X440
BD_OUTPUTS += \
$(BD_ADC_FULL_BD_OUTS) \
$(BD_ADC_100M_BD_OUTS) \
$(BD_DAC_100M_BD_OUTS)
endif