fpga: x440: refactor rf_core_full to use parameters on ports

Original-commit: 40bd20d240b2ee60ec58ad5a00a9ec9eebd1e9af
2024-08-21 08:06:41 -05:00
parent 08f8b269fa
commit ea4f2ff009
10 changed files with 281 additions and 889 deletions
@@ -55,7 +55,7 @@ endif
 # Sources
 ##################################################
 TOP_SRCS = \
-x4xx.v \
+x4xx.sv \
 x4xx_core.v \
 x4xx_core_common.v \
 x4xx_global_regs.v \
@@ -90,7 +90,8 @@ endif
 ifdef X440
 TOP_SRCS += \
 rf/100m/rf_core_100m.v \
-rf/full/rf_core_full.v \
+rf/full/rf_core_full.sv \
+rf/common/adc_iq_repacker.v \
 rf/x440/x440_rf_reset_controller.vhd \
 dboards/fbx/db_gpio_interface.v \
 dboards/fbx/ctrlport_to_i2c_sync_ctrl.v \