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timing: model SISO and MIMO BUFGMUX clocks

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Create generated clock copies on the shared radio BUFGMUX output and mark the full-rate SISO and divide-by-two MIMO modes logically exclusive.

This prevents static timing from attempting impossible cross-mode hold fixes while retaining valid timing relationships outside the shared clock tree.
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miegl
2026-08-25 22:31:36 +02:00
parent eb84b6c949
commit e7b1ac41e0
1 changed files with 34 additions and 1 deletions
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top/b200/b210.xdc
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@@ -175,11 +175,44 @@ set_property -dict {PACKAGE_PIN J10 IOSTANDARD LVCMOS33} [get_ports tx_enable2]
create_clock -period 10.000 -name IFCLK [get_ports IFCLK]
create_clock -period 16.276 -name codec_data_clk_p [get_ports codec_data_clk_p]
# --------------------------------------------------------------------------
# Radio clock BUFGMUX modes
#
# Vivado 2026.1 inferred these constraints with:
# write_inferred_xdc -excl_clocks
#
# The radio clock tree can run from either:
# I0 = codec_data_clk_p (full-rate / SISO)
# I1 = rx_clk_mimo_bufr (divide-by-2 / MIMO)
#
# These two modes are mutually exclusive only downstream of BUFGMUX_inst.
# Keep their upstream interaction intact.
# --------------------------------------------------------------------------
create_generated_clock \
-name codec_data_clk_p_Gen \
-source [get_pins b200_io_i0/BUFGMUX_inst/I0] \
-add \
-master_clock codec_data_clk_p \
-divide_by 1 \
[get_pins b200_io_i0/BUFGMUX_inst/O]
create_generated_clock \
-name rx_clk_mimo_bufr_Gen \
-source [get_pins b200_io_i0/BUFGMUX_inst/I1] \
-add \
-master_clock [get_clocks -of [get_pins b200_io_i0/BUFGMUX_inst/I1] -filter {IS_GENERATED}] \
-divide_by 1 \
[get_pins b200_io_i0/BUFGMUX_inst/O]
set_clock_groups \
-logically_exclusive \
-group [get_clocks -include_generated_clocks {codec_data_clk_p_Gen}] \
-group [get_clocks -include_generated_clocks {rx_clk_mimo_bufr_Gen}]
set_false_path -from [get_clocks -of_objects [get_pins gen_clks/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks codec_data_clk_p]
set_false_path -from [get_clocks -of_objects [get_pins gen_clks/inst/mmcm_adv_inst/CLKOUT1]] -to [get_clocks -of_objects [get_pins b200_io_i0/BUFR_inst/O]]
set_false_path -from [get_clocks codec_data_clk_p] -to [get_clocks -of_objects [get_pins gen_clks/inst/mmcm_adv_inst/CLKOUT1]]
set_false_path -from [get_clocks -of_objects [get_pins b200_io_i0/BUFR_inst/O]] -to [get_clocks -of_objects [get_pins gen_clks/inst/mmcm_adv_inst/CLKOUT1]]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]