fpga: e31x/e320/n3xx/x400: Rework device tree file generation

... to support custom image core name, example:

    rfnoc_image_builder -y n310_rfnoc_image_core.yml -n my_custom_name

The device tree source files were renamed to match the target
name used in the Makefile.

    example:
        old: dts/usrp_n310_fpga_hg.dts
        new: dts/N310_HG.dts

The source file is used to compile the final .dts file in the BUILD_DIR.

    example: build-my_custom_name/N310_HG.dts

The final .dts file is copied to the BUILD_OUTPUT_DIR as part of the
post build steps and renamed to the custom image core name.

    example: build/my_custom_name.dts

This completes the change that was introduced with commit 2afc66f132.


Original-commit: d40db57f2e03c322ac6b0001e0a59d4a14a5a3b9
This commit is contained in:
Joerg Hofrichter
2024-09-13 08:44:30 -05:00
committed by Wade Fife
parent 264b33a416
commit e01ce08634
29 changed files with 57 additions and 53 deletions
+19 -18
View File
@@ -75,6 +75,8 @@ ifeq ($(TARGET),bin)
cp $(BUILD_DIR)/x4xx.bit $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).bit; \
echo "Exporting build report..."; \
cp $(BUILD_DIR)/build.rpt $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).rpt; \
echo "Exporting devicetree file..."; \
cp $(BUILD_DIR)/$(1).dts $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts; \
echo "Build DONE ... $(IMAGE_CORE_NAME)";
else
post_build = @echo "Skipping bitfile export."
@@ -112,10 +114,10 @@ ifndef BUILD_DIR
$(error BUILD_DIR is not set! Use rfnoc_image_builder to create valid make commands)
endif
X410: check-variables X410_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts
X410: check-variables X410_IP $(BUILD_DIR)/X410.dts
$(call vivado_build,X410,$(DEFS) X410=1)
$(call post_build,X410)
X440: check-variables X440_IP $(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts
X440: check-variables X440_IP $(BUILD_DIR)/X440.dts
$(call vivado_build,X440,$(DEFS) X440=1)
$(call post_build,X440)
@@ -132,26 +134,25 @@ X410_IP: ##Build X410 IP only. Use the -j option to build multiple IP block
X440_IP: ##Build X440 IP only. Use the -j option to build multiple IP blocks simultaneously.
+$(call vivado_ip,X440,$(DEFS) X440=1)
ifeq ($(MAKECMDGOALS),X410)
$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tree.dts
-mkdir -p $(BUILD_OUTPUT_DIR)
dts/x410-version-info.dtsi: regmap/x410/versioning_regs_regmap_utils.vh
tools/parse_versions_for_dts.py \
--input regmap/x410/versioning_regs_regmap_utils.vh \
--output dts/x410-version-info.dtsi \
--input $< --output $@ \
--components fpga,cpld_ifc,db_gpio_ifc,rf_core_100m,rf_core_400m
${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ \
$(BUILD_DIR)/device_tree.dts
endif
ifeq ($(MAKECMDGOALS),X440)
$(BUILD_OUTPUT_DIR)/$(IMAGE_CORE_NAME).dts: dts/*.dts dts/*.dtsi $(BUILD_DIR)/device_tree.dts
-mkdir -p $(BUILD_OUTPUT_DIR)
dts/x440-version-info.dtsi: regmap/x440/versioning_regs_regmap_utils.vh
tools/parse_versions_for_dts.py \
--input regmap/x440/versioning_regs_regmap_utils.vh \
--output dts/x440-version-info.dtsi \
--input $< --output $@ \
--components fpga,cpld_ifc,db_gpio_ifc,rf_core_full
${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ \
$(BUILD_DIR)/device_tree.dts
endif
# The device tree source file $(BUILD_DIR)/device_tree.dts is generated by the
# RFNoC image builder.
$(BUILD_DIR)/X410.dts: $(BUILD_DIR)/device_tree.dts dts/x410-version-info.dtsi dts/*.dtsi
${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $<
# The device tree source file $(BUILD_DIR)/device_tree.dts is generated by the
# RFNoC image builder.
$(BUILD_DIR)/X440.dts: $(BUILD_DIR)/device_tree.dts dts/x440-version-info.dtsi dts/*.dtsi
${CC} -o $@ -C -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $<
clean: ##Clean up all target build outputs.
@echo "Cleaning targets..."