DUC/DDC: Add variable time increment
Sets time increment based on tick rate and sample rate instead of assuming one tick per sample. Defaults to legacy behavior. Minor compat number bumped on DUC and DDC blocks. Signed-off-by: Michael West <michael.west@ettus.com> Original-commit: 12dfb97c8efce40494efb35bdd81d06b6f8b9b62
This commit is contained in:
committed by
Aaron Rossetto
parent
45d274746f
commit
dc86b52fd7
@@ -1,6 +1,7 @@
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//
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//
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// Copyright 2016 Ettus Research
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// Copyright 2016 Ettus Research
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// Copyright 2018 Ettus Research, a National Instruments Company
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// Copyright 2018 Ettus Research, a National Instruments Company
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// Copyright 2020 Ettus Research, a National Instruments Brand
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//
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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//
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@@ -44,7 +45,8 @@ module axi_rate_change #(
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// Settings registers
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// Settings registers
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parameter SR_N_ADDR = 0,
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parameter SR_N_ADDR = 0,
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parameter SR_M_ADDR = 1,
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parameter SR_M_ADDR = 1,
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parameter SR_CONFIG_ADDR = 2
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parameter SR_CONFIG_ADDR = 2,
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parameter SR_TIME_INCR_ADDR = 3
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)(
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)(
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input clk, input reset, input clear,
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input clk, input reset, input clear,
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output clear_user, // Strobed after end of burst. Throttles input. Useful for resetting user code between bursts.
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output clear_user, // Strobed after end of burst. Throttles input. Useful for resetting user code between bursts.
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@@ -100,6 +102,15 @@ module axi_rate_change #(
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.out(sr_config), .changed());
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.out(sr_config), .changed());
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assign enable_clear_user = sr_config;
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assign enable_clear_user = sr_config;
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// Time increment in ticks per M samples
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wire [$clog2(MAX_N+1)-1:0] sr_time_incr;
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reg [$clog2(MAX_N+1)-1:0] time_incr;
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setting_reg #(
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.my_addr(SR_TIME_INCR_ADDR), .width($clog2(MAX_N+1)), .at_reset(0)
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) set_time_incr (
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.clk(clk), .rst(reset), .strobe(set_stb), .addr(set_addr), .in(set_data),
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.out(sr_time_incr), .changed());
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/********************************************************
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/********************************************************
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** Header, word count FIFOs
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** Header, word count FIFOs
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** - Header provides VITA Time and payload length for
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** - Header provides VITA Time and payload length for
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@@ -179,6 +190,8 @@ module axi_rate_change #(
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RECV_INIT : begin
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RECV_INIT : begin
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n <= sr_n;
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n <= sr_n;
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m <= sr_m;
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m <= sr_m;
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// Default time increment to sr_n value to preserve default behavior
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time_incr <= sr_time_incr == 0 ? sr_n : sr_time_incr;
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rate_changed <= 1'b0;
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rate_changed <= 1'b0;
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first_header <= 1'b1;
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first_header <= 1'b1;
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partial_first_word <= 1'b1;
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partial_first_word <= 1'b1;
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@@ -401,9 +414,9 @@ module axi_rate_change #(
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if (has_time_clear) begin
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if (has_time_clear) begin
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has_time_out <= 1'b0;
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has_time_out <= 1'b0;
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end
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end
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vita_time_out <= vita_time_accum + n;
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vita_time_out <= vita_time_accum + time_incr;
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end
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end
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vita_time_accum <= vita_time_accum + n;
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vita_time_accum <= vita_time_accum + time_incr;
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if (last_word_in_burst) begin
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if (last_word_in_burst) begin
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vt_state <= VT_INIT;
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vt_state <= VT_INIT;
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end
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end
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@@ -1,5 +1,6 @@
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//
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//
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// Copyright 2019 Ettus Research, a National Instruments Company
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// Copyright 2019 Ettus Research, a National Instruments Company
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// Copyright 2020 Ettus Research, a National Instruments Brand
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//
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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//
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@@ -73,7 +74,7 @@ module rfnoc_block_ddc #(
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localparam NIPC = 1;
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localparam NIPC = 1;
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localparam COMPAT_MAJOR = 16'h0;
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localparam COMPAT_MAJOR = 16'h0;
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localparam COMPAT_MINOR = 16'h0;
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localparam COMPAT_MINOR = 16'h1;
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`include "rfnoc_block_ddc_regs.vh"
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`include "rfnoc_block_ddc_regs.vh"
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`include "../../core/rfnoc_axis_ctrl_utils.vh"
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`include "../../core/rfnoc_axis_ctrl_utils.vh"
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@@ -334,7 +335,8 @@ module rfnoc_block_ddc #(
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.MAX_M(1),
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.MAX_M(1),
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.SR_N_ADDR(SR_N_ADDR),
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.SR_N_ADDR(SR_N_ADDR),
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.SR_M_ADDR(SR_M_ADDR),
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.SR_M_ADDR(SR_M_ADDR),
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.SR_CONFIG_ADDR(SR_CONFIG_ADDR))
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.SR_CONFIG_ADDR(SR_CONFIG_ADDR),
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.SR_TIME_INCR_ADDR(SR_TIME_INCR_ADDR))
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axi_rate_change (
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axi_rate_change (
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.clk(ce_clk), .reset(ce_rst), .clear(clear_tx_seqnum[i]), .clear_user(clear_user),
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.clk(ce_clk), .reset(ce_rst), .clear(clear_tx_seqnum[i]), .clear_user(clear_user),
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.src_sid(src_sid[16*i+15:16*i]), .dst_sid(next_dst_sid[16*i+15:16*i]),
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.src_sid(src_sid[16*i+15:16*i]), .dst_sid(next_dst_sid[16*i+15:16*i]),
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@@ -1,5 +1,6 @@
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//
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//
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// Copyright 2019 Ettus Research, A National Instruments Company
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// Copyright 2019 Ettus Research, A National Instruments Company
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// Copyright 2020 Ettus Research, A National Instruments Brand
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//
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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//
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@@ -13,15 +14,16 @@
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localparam DDC_BASE_ADDR = 'h00;
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localparam DDC_BASE_ADDR = 'h00;
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localparam DDC_ADDR_W = 8;
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localparam DDC_ADDR_W = 8;
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localparam RB_COMPAT_NUM = 0;
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localparam RB_COMPAT_NUM = 0;
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localparam RB_NUM_HB = 1;
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localparam RB_NUM_HB = 1;
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localparam RB_CIC_MAX_DECIM = 2;
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localparam RB_CIC_MAX_DECIM = 2;
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localparam SR_N_ADDR = 128;
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localparam SR_N_ADDR = 128;
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localparam SR_M_ADDR = 129;
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localparam SR_M_ADDR = 129;
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localparam SR_CONFIG_ADDR = 130;
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localparam SR_CONFIG_ADDR = 130;
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localparam SR_FREQ_ADDR = 132;
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localparam SR_FREQ_ADDR = 132;
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localparam SR_SCALE_IQ_ADDR = 133;
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localparam SR_SCALE_IQ_ADDR = 133;
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localparam SR_DECIM_ADDR = 134;
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localparam SR_DECIM_ADDR = 134;
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localparam SR_MUX_ADDR = 135;
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localparam SR_MUX_ADDR = 135;
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localparam SR_COEFFS_ADDR = 136;
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localparam SR_COEFFS_ADDR = 136;
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localparam SR_TIME_INCR_ADDR = 137;
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@@ -1,5 +1,6 @@
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//
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//
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// Copyright 2019 Ettus Research, a National Instruments Company
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// Copyright 2019 Ettus Research, a National Instruments Company
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// Copyright 2020 Ettus Research, a National Instruments Brand
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//
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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//
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@@ -73,7 +74,7 @@ module rfnoc_block_duc #(
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localparam NIPC = 1;
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localparam NIPC = 1;
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localparam COMPAT_MAJOR = 16'h0;
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localparam COMPAT_MAJOR = 16'h0;
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localparam COMPAT_MINOR = 16'h0;
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localparam COMPAT_MINOR = 16'h1;
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`include "rfnoc_block_duc_regs.vh"
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`include "rfnoc_block_duc_regs.vh"
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`include "../../core/rfnoc_axis_ctrl_utils.vh"
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`include "../../core/rfnoc_axis_ctrl_utils.vh"
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@@ -316,7 +317,8 @@ module rfnoc_block_duc #(
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.MAX_M(MAX_M),
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.MAX_M(MAX_M),
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.SR_N_ADDR(SR_N_ADDR),
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.SR_N_ADDR(SR_N_ADDR),
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.SR_M_ADDR(SR_M_ADDR),
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.SR_M_ADDR(SR_M_ADDR),
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.SR_CONFIG_ADDR(SR_CONFIG_ADDR))
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.SR_CONFIG_ADDR(SR_CONFIG_ADDR),
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.SR_TIME_INCR_ADDR(SR_TIME_INCR_ADDR))
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axi_rate_change (
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axi_rate_change (
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.clk(ce_clk), .reset(ce_rst), .clear(clear_tx_seqnum[i]), .clear_user(clear_user),
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.clk(ce_clk), .reset(ce_rst), .clear(clear_tx_seqnum[i]), .clear_user(clear_user),
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.src_sid(src_sid[16*i+15:16*i]), .dst_sid(next_dst_sid[16*i+15:16*i]),
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.src_sid(src_sid[16*i+15:16*i]), .dst_sid(next_dst_sid[16*i+15:16*i]),
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@@ -1,5 +1,6 @@
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//
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//
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// Copyright 2019 Ettus Research, A National Instruments Company
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// Copyright 2019 Ettus Research, A National Instruments Company
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// Copyright 2020 Ettus Research, A National Instruments Brand
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//
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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//
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@@ -22,4 +23,4 @@ localparam SR_CONFIG_ADDR = 130;
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localparam SR_INTERP_ADDR = 131;
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localparam SR_INTERP_ADDR = 131;
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localparam SR_FREQ_ADDR = 132;
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localparam SR_FREQ_ADDR = 132;
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localparam SR_SCALE_IQ_ADDR = 133;
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localparam SR_SCALE_IQ_ADDR = 133;
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localparam SR_TIME_INCR_ADDR = 137;
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