fpga: tools: Improve native ModelSim support

This adds support for colored output and support for directories added
to the list of source files (for HLS support).


Original-commit: 5b3d66e5b7cedb7098de3e4dbbee70af04a3626e
This commit is contained in:
Wade Fife
2020-05-26 13:36:55 -05:00
parent 98463e99d0
commit d3615aefe0
3 changed files with 255 additions and 72 deletions
+38 -72
View File
@@ -14,7 +14,7 @@ SIM_FAST=false
endif
# -------------------------------------------------------------------
# Path variables
# Variables
# -------------------------------------------------------------------
ifdef SIM_COMPLIBDIR
@@ -24,57 +24,18 @@ endif
# Parse part name from ID
PART_NAME=$(subst /,,$(PART_ID))
# -------------------------------------------------------------------
# Usage: SETUP_AND_LAUNCH_SIMULATION
# Args: $1 = Simulator Name
# -------------------------------------------------------------------
# Resolve path
EXP_DESIGN_SRCS = $(call RESOLVE_PATHS,$(DESIGN_SRCS))
EXP_SIM_SRCS = $(call RESOLVE_PATHS,$(SIM_SRCS))
EXP_INC_SRCS = $(call RESOLVE_PATHS,$(INC_SRCS))
# (NOQ) No quotes!
NOQ_DESIGN_SRCS := $(subst $\",,$(EXP_DESIGN_SRCS))
NOQ_SIM_SRCS := $(subst $\",,$(EXP_SIM_SRCS))
NOQ_INC_SRCS := $(subst $\",,$(EXP_INC_SRCS))
# Separate out VHDL
NOQ_DESIGN_VHDL := $(filter %.vhd,$(NOQ_DESIGN_SRCS))
NOQ_SIM_VHDL := $(filter %.vhd,$(NOQ_SIM_SRCS))
NOQ_VHDL := $(NOQ_DESIGN_VHDL) $(NOQ_SIM_VHDL)
# Separate out System Verilog
NOQ_DESIGN_SV := $(filter %.sv,$(NOQ_DESIGN_SRCS))
NOQ_SIM_SV := $(filter %.sv,$(NOQ_SIM_SRCS))
NOQ_SV := $(NOQ_DESIGN_SV) $(NOQ_SIM_SV)
# Fetch packages from include list to compile
NOQ_PKG_SV := $(filter %.sv,$(NOQ_INC_SRCS))
# Seperate out Verilog
NOQ_INC_DIRS := $(sort $(dir $(NOQ_DESIGN_SRCS) $(NOQ_SIM_SRCS) $(NOQ_INC_SRCS)))
NOQ_DESIGN_VERILOG := $(filter %.v,$(NOQ_DESIGN_SRCS))
NOQ_SIM_VERILOG := $(filter %.v,$(NOQ_SIM_SRCS))
NOQ_VERILOG := $(NOQ_DESIGN_VERILOG) $(NOQ_SIM_VERILOG)
# Modelsim Load libraries
MODELSIM_LIBS += unisims_ver
# Arguments for various simulators
MODELSIM_ARGS_L += $(MODELSIM_ARGS) -quiet
SVLOG_ARGS_L += $(SVLOG_ARGS) -quiet +define+WORKING_DIR="\"${CURDIR}\""
VLOG_ARGS_L += $(VLOG_ARGS) -quiet +define+WORKING_DIR="\"${CURDIR}\""
VHDL_ARGS_L += $(VHDL_ARGS) -quiet
# Working directory for standalone ModelSim execution
# Working directory for native ModelSim execution
MODELSIM_PROJ_DIR ?= modelsim_proj
# Check if we want to load the ModelSim GUI
ifeq ($(GUI), 1)
MODELSIM_ARGS_L += -voptargs=+acc
else
MODELSIM_ARGS_L += -c -do "run -all; quit -f"
endif
# -------------------------------------------------------------------
# Usage: SETUP_AND_LAUNCH_SIMULATION
# Args: $1 = Simulator Name
# -------------------------------------------------------------------
SETUP_AND_LAUNCH_SIMULATION = \
@ \
@@ -93,6 +54,36 @@ SETUP_AND_LAUNCH_SIMULATION = \
export VIV_SIM_64BIT=$(MODELSIM_64BIT); \
$(TOOLS_DIR)/scripts/launch_vivado.sh -mode $(VIVADO_MODE) -source $(call RESOLVE_PATH,$(TOOLS_DIR)/scripts/viv_sim_project.tcl) -log xsim.log -nojournal
# -------------------------------------------------------------------
# Usage: SETUP_AND_LAUNCH_VLINT
# Args: N/A
# -------------------------------------------------------------------
SETUP_AND_LAUNCH_VLINT = \
@ \
export VLINT_PROJ_DIR=$(MODELSIM_PROJ_DIR); \
export VLINT_DESIGN_SRCS=$(EXP_DESIGN_SRCS); \
export VLINT_SIM_SRCS=$(EXP_SIM_SRCS); \
export VLINT_INC_SRCS=$(EXP_INC_SRCS); \
export VLINT_SVLOG_ARGS="$(SVLOG_ARGS)"; \
export VLINT_VLOG_ARGS="$(VLOG_ARGS)"; \
export VLINT_VHDL_ARGS="$(VHDL_ARGS)"; \
$(TOOLS_DIR)/scripts/launch_vlint.sh
# -------------------------------------------------------------------
# Usage: SETUP_AND_LAUNCH_VLINT
# Args: N/A
# -------------------------------------------------------------------
SETUP_AND_LAUNCH_MODELSIM = \
@ \
export MSIM_PROJ_DIR=$(MODELSIM_PROJ_DIR); \
export MSIM_SIM_TOP=$(SIM_TOP); \
export MSIM_ARGS="$(MODELSIM_ARGS)"; \
export MSIM_LIBS="$(MODELSIM_LIBS)"; \
export MSIM_MODE=$(VIVADO_MODE); \
$(TOOLS_DIR)/scripts/launch_modelsim.sh
.SECONDEXPANSION:
##xsim: Run the simulation using the Xilinx Vivado Simulator
@@ -115,39 +106,14 @@ vsim: .check_tool $(COMPLIBDIR) $(DESIGN_SRCS) $(SIM_SRCS) $(INC_SRCS)
##modelsim: Run the simulation using Modelsim (natively)
modelsim: .check_tool vlint
cd $(MODELSIM_PROJ_DIR) && vsim $(MODELSIM_ARGS_L) $(foreach lib,$(MODELSIM_LIBS),-L $(lib)) $(SIM_TOP)
$(call SETUP_AND_LAUNCH_MODELSIM)
# NOTE: VHDL files require a correct compile order. This script compiles files
# in the order they are defined in $(DESIGN_SRC), then $SIM_SRC)
##vlint: Run ModelSim compiler to lint files.
vlint: .check_tool $(COMPLIBDIR) $(DESIGN_SRCS) $(SIM_SRCS) $(INC_SRCS)
$(shell mkdir -p ./$(MODELSIM_PROJ_DIR))
$(file >$(MODELSIM_PROJ_DIR)/svlogarglist.txt,/* Auto generated argument file for vlog -sv */)
$(file >>$(MODELSIM_PROJ_DIR)/svlogarglist.txt,-sv)
$(foreach dir,$(NOQ_INC_DIRS), $(file >>$(MODELSIM_PROJ_DIR)/svlogarglist.txt,+incdir+$(dir)))
$(foreach src,$(NOQ_PKG_SV), $(file >>$(MODELSIM_PROJ_DIR)/svlogarglist.txt,$(src)))
$(foreach src,$(NOQ_SV), $(file >>$(MODELSIM_PROJ_DIR)/svlogarglist.txt,$(src)))
$(file >$(MODELSIM_PROJ_DIR)/vlogarglist.txt,/* Auto generated argument file for vlog */)
$(file >>$(MODELSIM_PROJ_DIR)/vlogarglist.txt,-vlog01compat)
$(foreach dir,$(NOQ_INC_DIRS), $(file >>$(MODELSIM_PROJ_DIR)/vlogarglist.txt,+incdir+$(dir)))
$(foreach src,$(NOQ_VERILOG), $(file >>$(MODELSIM_PROJ_DIR)/vlogarglist.txt,$(src)))
$(file >$(MODELSIM_PROJ_DIR)/vcomarglist.txt,/* Auto generated argument file for vcom */)
$(file >>$(MODELSIM_PROJ_DIR)/vcomarglist.txt,-2008)
$(foreach src,$(NOQ_VHDL),$(file >>$(MODELSIM_PROJ_DIR)/vcomarglist.txt,$(src)))
ifneq ($(strip $(NOQ_SV)),)
@echo "*** COMPILING SYSTEM VERILOG ***"
cd $(MODELSIM_PROJ_DIR) && vlog $(SVLOG_ARGS_L) -f svlogarglist.txt
endif
ifneq ($(strip $(NOQ_VERILOG)),)
@echo "*** COMPILING VERILOG ***"
cd $(MODELSIM_PROJ_DIR) && vlog $(VLOG_ARGS_L) -f vlogarglist.txt
endif
ifneq ($(strip $(NOQ_VHDL)),)
@echo "*** COMPILING VHDL ***"
cd $(MODELSIM_PROJ_DIR) && vcom $(VHDL_ARGS_L) -f vcomarglist.txt
endif
$(call SETUP_AND_LAUNCH_VLINT)
##vclean: Cleanup ModelSim intermediate files
vclean:
+69
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@@ -0,0 +1,69 @@
#!/bin/bash
#------------------------------------------
# Colorize
#------------------------------------------
# VIV_COLOR_SCHEME must be defined in the environment setup script
case "$VIV_COLOR_SCHEME" in
default)
CLR_OFF='tput sgr0'
ERR_CLR='tput setaf 1'
WARN_CLR='tput setaf 3'
INFO_CLR='tput setaf 6'
;;
*)
CLR_OFF=''
ERR_CLR=$CLR_OFF
WARN_CLR=$CLR_OFF
INFO_CLR=$CLR_OFF
esac
# Display output string colorized
function print_color {
case $line in
*Fatal:*|*Failure:*)
eval $ERR_CLR; echo "$line"; eval $CLR_OFF
;;
*Error:*|*Error[[:space:]]\(suppressible\):*)
eval $ERR_CLR; echo "$line"; eval $CLR_OFF
;;
*Warning:*)
eval $WARN_CLR; echo "$line"; eval $CLR_OFF
;;
*Info:*|*Note:*)
eval $INFO_CLR; echo "$line"; eval $CLR_OFF
;;
*)
echo "$line"
esac
}
#------------------------------------------
# Launch ModelSim
#------------------------------------------
# Using -voptargs=+acc makes everything visible in the simulator for GUI mode
# and avoids some cases where simulation mismatch could otherwise occur.
MSIM_DEFAULT="-voptargs=+acc -quiet -L unisims_ver"
cd $MSIM_PROJ_DIR
# Generate the library options string
MSIM_LIB_ARGS=
for lib in $MSIM_LIBS
do
MSIM_LIB_ARGS+="-L $lib "
done
if [ $MSIM_MODE == "gui" ]; then
vsim $MSIM_DEFAULT $MSIM_ARGS $MSIM_LIB_ARGS $MSIM_SIM_TOP 2>&1 | while IFS= read -r line; do
print_color $line
done
if [ ${PIPESTATUS[0]} -ne 0 ]; then exit ${PIPESTATUS[0]}; fi
elif [ $MSIM_MODE == "batch" ]; then
vsim -batch -do "run -all; quit -f" $MSIM_DEFAULT $MSIM_ARGS $MSIM_LIB_ARGS $MSIM_SIM_TOP 2>&1 | while IFS= read -r line; do
print_color $line
done
if [ ${PIPESTATUS[0]} -ne 0 ]; then exit ${PIPESTATUS[0]}; fi
fi
+148
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@@ -0,0 +1,148 @@
#!/bin/bash
#------------------------------------------
# Colorize
#------------------------------------------
# VIV_COLOR_SCHEME must be defined in the environment setup script
case "$VIV_COLOR_SCHEME" in
default)
CLR_OFF='tput sgr0'
ERR_CLR='tput setaf 1'
CRIWARN_CLR='tput setaf 1'
WARN_CLR='tput setaf 3'
;;
*)
CLR_OFF=''
ERR_CLR=$CLR_OFF
CRIWARN_CLR=$CLR_OFF
WARN_CLR=$CLR_OFF
esac
# Display output string colorized
function print_color {
case $line in
*Fatal:*)
eval $ERR_CLR; echo "$line"; eval $CLR_OFF
;;
*Error:*)
eval $ERR_CLR; echo "$line"; eval $CLR_OFF
;;
*Warning:*)
eval $WARN_CLR; echo "$line"; eval $CLR_OFF
;;
*)
echo "$line"
esac
}
#------------------------------------------
# Functions
#------------------------------------------
# Replace any directories with the files they include
function replace_dirs_with_source {
for file in "$@"
do
if [ -d $file ]; then
echo "$(realpath $(find $file -maxdepth 1 -type f)) "
else
echo "$file "
fi
done
}
#------------------------------------------
# Initialize Variables
#------------------------------------------
WORKING_DIR=$(pwd)
# Define arguments to pass to the compile
SVLOG_ARGS="$VLINT_SVLOG_ARGS -quiet +define+WORKING_DIR=$WORKING_DIR"
VLOG_ARGS="$VLINT_VLOG_ARGS -quiet +define+WORKING_DIR=$WORKING_DIR"
VHDL_ARGS="$VLINT_VHDL_ARGS -quiet"
# Define files in which to store all the compiler arguments
SV_ARGS_FILE=svlogarglist.txt
V_ARGS_FILE=vlogarglist.txt
VHD_ARGS_FILE=vcomarglist.txt
# Replace any directories with the sources they contain
SOURCES=
SOURCES+=$(replace_dirs_with_source $VLINT_INC_SRCS)
SOURCES+=$(replace_dirs_with_source $VLINT_SIM_SRCS)
SOURCES+=$(replace_dirs_with_source $VLINT_DESIGN_SRCS)
# Separate the files by type and determine include directories to use
V_FILES=
SV_FILES=
VHDL_FILES=
V_INC=
for file in $SOURCES
do
if [[ ${file: -3} == ".sv" ]]; then
SV_FILES+="$file "
V_INC+="+incdir+${file%/*}/ "
elif [[ ${file: -2} == ".v" ]]; then
V_FILES+="$file "
V_INC+="+incdir+${file%/*}/ "
elif [[ ${file: -3} == ".vh" || ${file: -4} == ".svh" ]]; then
V_INC+="+incdir+${file%/*}/ "
elif [[ ${file: -4} == ".vhd" ]]; then
VHD_FILES+="$file "
fi
done
# Remove duplicates from the lists of files and directories
SV_FILES=$(printf '%s\n' $SV_FILES | awk '!a[$0]++')
V_FILES=$(printf '%s\n' $V_FILES | awk '!a[$0]++')
VHD_FILES=$(printf '%s\n' $VHD_FILES | awk '!a[$0]++')
V_INC=$(printf '%s\n' $V_INC | awk '!a[$0]++')
#------------------------------------------
# Compile HDL
#------------------------------------------
# Generate argument files
mkdir -p ./$VLINT_PROJ_DIR
cd ./$VLINT_PROJ_DIR
echo "/* Auto generated argument file for vlog -sv */" > $SV_ARGS_FILE
echo "-sv" >> $SV_ARGS_FILE
printf '%s\n' $V_INC $SV_FILES >> $SV_ARGS_FILE
echo "/* Auto generated argument file for vlog -v */" > $V_ARGS_FILE
echo "-vlog01compat" >> $V_ARGS_FILE
printf '%s\n' $V_INC $V_FILES >> $V_ARGS_FILE
echo "/* Auto generated argument file for vcom */" > $VHD_ARGS_FILE
echo "-2008" >> $VHD_ARGS_FILE
printf '%s\n' $VHD_FILES >> $VHD_ARGS_FILE
# Run ModelSim compiler for each file type
if [[ -n "$SV_FILES" ]]; then
echo "* Compiling SystemVerilog"
vlog $SVLOG_ARGS -sv -f svlogarglist.txt 2>&1 | while IFS= read -r line; do
print_color $line
done
if [ ${PIPESTATUS[0]} -ne 0 ]; then exit ${PIPESTATUS[0]}; fi
fi
if [[ -n "$V_FILES" ]]; then
echo "* Compiling Verilog"
vlog $VLOG_ARGS -f vlogarglist.txt 2>&1 | while IFS= read -r line; do
print_color $line
done
if [ ${PIPESTATUS[0]} -ne 0 ]; then exit ${PIPESTATUS[0]}; fi
fi
if [[ -n "$VHD_FILES" ]]; then
echo "* Compiling VHDL"
vcom $VHDL_ARGS -f vcomarglist.txt 2>&1 | while IFS= read -r line; do
print_color $line
done
if [ ${PIPESTATUS[0]} -ne 0 ]; then exit ${PIPESTATUS[0]}; fi
fi