Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.

Original-commit: 0df4b801a34697f2058b4a7b95e08d2a0576c9db
2013-10-10 10:17:27 -07:00
commit c91b74de33
488 changed files with 281740 additions and 0 deletions
@@ -0,0 +1,10 @@
+SET busformat = BusFormatAngleBracketNotRipped
+SET designentry = Verilog
+SET device = xc6slx75
+SET devicefamily = spartan6
+SET flowvendor = Foundation_ISE
+SET package = fgg484
+SET speedgrade = -3
+SET verilogsim = true
+SET vhdlsim = false
+